mtd: cleanup nand.h

- *var instead of * var
- proper multiline comment
- func(args) instead of func (args)
- 80 lines

So from
|total: 2 errors, 37 warnings, 654 lines checked
we got to one warning.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

1 files changed, 99 insertions, 56 deletions

diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 023866572fb1..acd0b500f55a 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -27,15 +27,17 @@
 struct mtd_info;
 struct nand_flash_dev;
 /* Scan and identify a NAND device */
-extern int nand_scan (struct mtd_info *mtd, int max_chips);
-/* Separate phases of nand_scan(), allowing board driver to intervene
- * and override command or ECC setup according to flash type */
+extern int nand_scan(struct mtd_info *mtd, int max_chips);
+/*
+ * Separate phases of nand_scan(), allowing board driver to intervene
+ * and override command or ECC setup according to flash type.
+ */
 extern int nand_scan_ident(struct mtd_info *mtd, int max_chips,
                            struct nand_flash_dev *table);
 extern int nand_scan_tail(struct mtd_info *mtd);
 
 /* Free resources held by the NAND device */
-extern void nand_release (struct mtd_info *mtd);
+extern void nand_release(struct mtd_info *mtd);
 
 /* Internal helper for board drivers which need to override command function */
 extern void nand_wait_ready(struct mtd_info *mtd);
@@ -49,7 +51,8 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
 /* The maximum number of NAND chips in an array */
 #define NAND_MAX_CHIPS          8
 
-/* This constant declares the max. oobsize / page, which
+/*
+ * This constant declares the max. oobsize / page, which
  * is supported now. If you add a chip with bigger oobsize/page
  * adjust this accordingly.
  */
@@ -153,9 +156,10 @@ typedef enum {
 #define NAND_GET_DEVICE         0x80
 
 
-/* Option constants for bizarre disfunctionality and real
-*  features
-*/
+/*
+ * Option constants for bizarre disfunctionality and real
+ * features.
+ */
 /* Chip can not auto increment pages */
 #define NAND_NO_AUTOINCR        0x00000001
 /* Buswitdh is 16 bit */
@@ -166,19 +170,27 @@ typedef enum {
 #define NAND_CACHEPRG           0x00000008
 /* Chip has copy back function */
 #define NAND_COPYBACK           0x00000010
-/* AND Chip which has 4 banks and a confusing page / block
- * assignment. See Renesas datasheet for further information */
+/*
+ * AND Chip which has 4 banks and a confusing page / block
+ * assignment. See Renesas datasheet for further information.
+ */
 #define NAND_IS_AND             0x00000020
-/* Chip has a array of 4 pages which can be read without
- * additional ready /busy waits */
+/*
+ * Chip has a array of 4 pages which can be read without
+ * additional ready /busy waits.
+ */
 #define NAND_4PAGE_ARRAY        0x00000040
-/* Chip requires that BBT is periodically rewritten to prevent
+/*
+ * Chip requires that BBT is periodically rewritten to prevent
  * bits from adjacent blocks from 'leaking' in altering data.
- * This happens with the Renesas AG-AND chips, possibly others.  */
+ * This happens with the Renesas AG-AND chips, possibly others.
+ */
 #define BBT_AUTO_REFRESH        0x00000080
-/* Chip does not require ready check on read. True
+/*
+ * Chip does not require ready check on read. True
  * for all large page devices, as they do not support
- * autoincrement.*/
+ * autoincrement.
+ */
 #define NAND_NO_READRDY         0x00000100
 /* Chip does not allow subpage writes */
 #define NAND_NO_SUBPAGE_WRITE   0x00000200
@@ -213,8 +225,10 @@ typedef enum {
 #define NAND_USE_FLASH_BBT      0x00010000
 /* This option skips the bbt scan during initialization. */
 #define NAND_SKIP_BBTSCAN       0x00020000
-/* This option is defined if the board driver allocates its own buffers
-   (e.g. because it needs them DMA-coherent */
+/*
+ * This option is defined if the board driver allocates its own buffers
+ * (e.g. because it needs them DMA-coherent).
+ */
 #define NAND_OWN_BUFFERS        0x00040000
 /* Chip may not exist, so silence any errors in scan */
 #define NAND_SCAN_SILENT_NODEV  0x00080000
@@ -304,8 +318,9 @@ struct nand_onfi_params {
  * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
  * @lock:               protection lock
  * @active:             the mtd device which holds the controller currently
- * @wq:                 wait queue to sleep on if a NAND operation is in progress
- *                      used instead of the per chip wait queue when a hw controller is available
+ * @wq:                 wait queue to sleep on if a NAND operation is in
+ *                      progress used instead of the per chip wait queue
+ *                      when a hw controller is available.
  */
 struct nand_hw_control {
         spinlock_t       lock;
@@ -329,9 +344,11 @@ struct nand_hw_control {
  * @correct:    function for ecc correction, matching to ecc generator (sw/hw)
  * @read_page_raw:      function to read a raw page without ECC
  * @write_page_raw:     function to write a raw page without ECC
- * @read_page:  function to read a page according to the ecc generator requirements
+ * @read_page:  function to read a page according to the ecc generator
+ *              requirements.
  * @read_subpage:       function to read parts of the page covered by ECC.
- * @write_page: function to write a page according to the ecc generator requirements
+ * @write_page: function to write a page according to the ecc generator
+ *              requirements.
  * @read_oob:   function to read chip OOB data
  * @write_oob:  function to write chip OOB data
  */
@@ -393,13 +410,16 @@ struct nand_buffers {
 
 /**
  * struct nand_chip - NAND Private Flash Chip Data
- * @IO_ADDR_R:          [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
- * @IO_ADDR_W:          [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
+ * @IO_ADDR_R:          [BOARDSPECIFIC] address to read the 8 I/O lines of the
+ *                      flash device
+ * @IO_ADDR_W:          [BOARDSPECIFIC] address to write the 8 I/O lines of the
+ *                      flash device.
  * @read_byte:          [REPLACEABLE] read one byte from the chip
  * @read_word:          [REPLACEABLE] read one word from the chip
  * @write_buf:          [REPLACEABLE] write data from the buffer to the chip
  * @read_buf:           [REPLACEABLE] read data from the chip into the buffer
- * @verify_buf:         [REPLACEABLE] verify buffer contents against the chip data
+ * @verify_buf:         [REPLACEABLE] verify buffer contents against the chip
+ *                      data.
  * @select_chip:        [REPLACEABLE] select chip nr
  * @block_bad:          [REPLACEABLE] check, if the block is bad
  * @block_markbad:      [REPLACEABLE] mark the block bad
@@ -409,45 +429,60 @@ struct nand_buffers {
  *                      mtd->oobsize, mtd->writesize and so on.
  *                      @id_data contains the 8 bytes values of NAND_CMD_READID.
  *                      Return with the bus width.
- * @dev_ready:          [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
- *                      If set to NULL no access to ready/busy is available and the ready/busy information
- *                      is read from the chip status register
- * @cmdfunc:            [REPLACEABLE] hardwarespecific function for writing commands to the chip
- * @waitfunc:           [REPLACEABLE] hardwarespecific function for wait on ready
+ * @dev_ready:          [BOARDSPECIFIC] hardwarespecific function for accesing
+ *                      device ready/busy line. If set to NULL no access to
+ *                      ready/busy is available and the ready/busy information
+ *                      is read from the chip status register.
+ * @cmdfunc:            [REPLACEABLE] hardwarespecific function for writing
+ *                      commands to the chip.
+ * @waitfunc:           [REPLACEABLE] hardwarespecific function for wait on
+ *                      ready.
  * @ecc:                [BOARDSPECIFIC] ecc control ctructure
  * @buffers:            buffer structure for read/write