diff options
author | Kyungmin Park <kyungmin.park@samsung.com> | 2006-05-12 10:03:07 -0400 |
---|---|---|
committer | Jarkko Lavinen <lavinen@pentafluge.infradead.org> | 2006-05-12 10:35:50 -0400 |
commit | 493c646077ef0b8668ed71b8057f81cb7454af87 (patch) | |
tree | e05992a8d8c9ba911e5a9809dc0678ca50e96c76 /include/linux/mtd/onenand_regs.h | |
parent | 3cecf69ecde22199699c4f0e609dfed2a487b674 (diff) |
OneNAND: One-Time Programmable (OTP) support
One Block of the NAND Flash Array memory is reserved as
a One-Time Programmable Block memory area.
Also, 1st Block of NAND Flash Array can be used as OTP.
The OTP block can be read, programmed and locked using the same
operations as any other NAND Flash Array memory block.
OTP block cannot be erased.
OTP block is fully-guaranteed to be a valid block.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Diffstat (limited to 'include/linux/mtd/onenand_regs.h')
-rw-r--r-- | include/linux/mtd/onenand_regs.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h index d7832ef8ed63..4a72818d2545 100644 --- a/include/linux/mtd/onenand_regs.h +++ b/include/linux/mtd/onenand_regs.h | |||
@@ -112,6 +112,7 @@ | |||
112 | #define ONENAND_CMD_LOCK_TIGHT (0x2C) | 112 | #define ONENAND_CMD_LOCK_TIGHT (0x2C) |
113 | #define ONENAND_CMD_ERASE (0x94) | 113 | #define ONENAND_CMD_ERASE (0x94) |
114 | #define ONENAND_CMD_RESET (0xF0) | 114 | #define ONENAND_CMD_RESET (0xF0) |
115 | #define ONENAND_CMD_OTP_ACCESS (0x65) | ||
115 | #define ONENAND_CMD_READID (0x90) | 116 | #define ONENAND_CMD_READID (0x90) |
116 | 117 | ||
117 | /* NOTE: Those are not *REAL* commands */ | 118 | /* NOTE: Those are not *REAL* commands */ |
@@ -152,6 +153,8 @@ | |||
152 | #define ONENAND_CTRL_ERASE (1 << 11) | 153 | #define ONENAND_CTRL_ERASE (1 << 11) |
153 | #define ONENAND_CTRL_ERROR (1 << 10) | 154 | #define ONENAND_CTRL_ERROR (1 << 10) |
154 | #define ONENAND_CTRL_RSTB (1 << 7) | 155 | #define ONENAND_CTRL_RSTB (1 << 7) |
156 | #define ONENAND_CTRL_OTP_L (1 << 6) | ||
157 | #define ONENAND_CTRL_OTP_BL (1 << 5) | ||
155 | 158 | ||
156 | /* | 159 | /* |
157 | * Interrupt Status Register F241h (R) | 160 | * Interrupt Status Register F241h (R) |
@@ -177,4 +180,9 @@ | |||
177 | #define ONENAND_ECC_2BIT (1 << 1) | 180 | #define ONENAND_ECC_2BIT (1 << 1) |
178 | #define ONENAND_ECC_2BIT_ALL (0xAAAA) | 181 | #define ONENAND_ECC_2BIT_ALL (0xAAAA) |
179 | 182 | ||
183 | /* | ||
184 | * One-Time Programmable (OTP) | ||
185 | */ | ||
186 | #define ONENAND_OTP_LOCK_OFFSET (14) | ||
187 | |||
180 | #endif /* __ONENAND_REG_H */ | 188 | #endif /* __ONENAND_REG_H */ |