diff options
author | Artem Bityutskiy <artem.bityutskiy@linux.intel.com> | 2013-03-04 07:50:43 -0500 |
---|---|---|
committer | David Woodhouse <David.Woodhouse@intel.com> | 2013-04-05 07:01:44 -0400 |
commit | 96dca4c29c5e4fc158f8f31513994408c90c6818 (patch) | |
tree | b2c7f2971247464e0ee07b15ef89f9ef2a506bc9 /include/linux/mtd/nand.h | |
parent | 0be718e5525a73557e76ea1c05b8001dde507049 (diff) |
mtd: nand: remove NAND_NO_PADDING macro
It is not used anywhere.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include/linux/mtd/nand.h')
-rw-r--r-- | include/linux/mtd/nand.h | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index e5d6160a4511..10fd7df07b5e 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h | |||
@@ -145,8 +145,6 @@ typedef enum { | |||
145 | */ | 145 | */ |
146 | /* Buswidth is 16 bit */ | 146 | /* Buswidth is 16 bit */ |
147 | #define NAND_BUSWIDTH_16 0x00000002 | 147 | #define NAND_BUSWIDTH_16 0x00000002 |
148 | /* Device supports partial programming without padding */ | ||
149 | #define NAND_NO_PADDING 0x00000004 | ||
150 | /* Chip has cache program function */ | 148 | /* Chip has cache program function */ |
151 | #define NAND_CACHEPRG 0x00000008 | 149 | #define NAND_CACHEPRG 0x00000008 |
152 | /* Chip has copy back function */ | 150 | /* Chip has copy back function */ |
@@ -171,11 +169,9 @@ typedef enum { | |||
171 | #define NAND_SUBPAGE_READ 0x00001000 | 169 | #define NAND_SUBPAGE_READ 0x00001000 |
172 | 170 | ||
173 | /* Options valid for Samsung large page devices */ | 171 | /* Options valid for Samsung large page devices */ |
174 | #define NAND_SAMSUNG_LP_OPTIONS \ | 172 | #define NAND_SAMSUNG_LP_OPTIONS (NAND_CACHEPRG | NAND_COPYBACK) |
175 | (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) | ||
176 | 173 | ||
177 | /* Macros to identify the above */ | 174 | /* Macros to identify the above */ |
178 | #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) | ||
179 | #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) | 175 | #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) |
180 | #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) | 176 | #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) |
181 | #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) | 177 | #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) |