diff options
author | Brian Norris <computersforpeace@gmail.com> | 2012-01-13 21:11:50 -0500 |
---|---|---|
committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-03-26 19:12:42 -0400 |
commit | 661a08327d11bcc4cf649c5ae4bdf2db0a87b320 (patch) | |
tree | 23d0bdfeb86e3ea540a30d69be6499360486be3a /include/linux/mtd/nand.h | |
parent | 85443319989bb91814504608a6e11d880e156828 (diff) |
mtd: nand: correct comment on nand_chip badblockbits
The description for badblockbits is incorrect. I think someone just made
up a false description on the spot to satisfy some kerneldoc warning.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'include/linux/mtd/nand.h')
-rw-r--r-- | include/linux/mtd/nand.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 63b5a8b6dfbd..609868f3db42 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h | |||
@@ -448,8 +448,9 @@ struct nand_buffers { | |||
448 | * will be copied to the appropriate nand_bbt_descr's. | 448 | * will be copied to the appropriate nand_bbt_descr's. |
449 | * @badblockpos: [INTERN] position of the bad block marker in the oob | 449 | * @badblockpos: [INTERN] position of the bad block marker in the oob |
450 | * area. | 450 | * area. |
451 | * @badblockbits: [INTERN] number of bits to left-shift the bad block | 451 | * @badblockbits: [INTERN] minimum number of set bits in a good block's |
452 | * number | 452 | * bad block marker position; i.e., BBM == 11110111b is |
453 | * not bad when badblockbits == 7 | ||
453 | * @cellinfo: [INTERN] MLC/multichip data from chip ident | 454 | * @cellinfo: [INTERN] MLC/multichip data from chip ident |
454 | * @numchips: [INTERN] number of physical chips | 455 | * @numchips: [INTERN] number of physical chips |
455 | * @chipsize: [INTERN] the size of one chip for multichip arrays | 456 | * @chipsize: [INTERN] the size of one chip for multichip arrays |