diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-28 12:33:42 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-28 12:33:42 -0400 |
commit | 00ebb6382b8d9c7c15b5f8ad230670d8161d38dd (patch) | |
tree | 23591394b83776953aaf0b382d4c7b09e0ca1e34 /include/linux/mmc | |
parent | 11cc21f5f5575b9abd14d53a6055ccbf72b67573 (diff) | |
parent | 536ac998f6076a0ae423b1046b85d7690e8b7107 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (66 commits)
mmc: add new sdhci-pxa driver for Marvell SoCs
mmc: make number of mmcblk minors configurable
mmc_spi: Recover from CRC errors for r/w operation over SPI.
mmc: sdhci-pltfm: add -pltfm driver for imx35/51
mmc: sdhci-of-esdhc: factor out common stuff
mmc: sdhci_pltfm: pass more data on custom init call
mmc: sdhci: introduce get_ro private write-protect hook
mmc: sdhci-pltfm: move .h file into appropriate subdir
mmc: sdhci-pltfm: Add structure for host-specific data
mmc: fix cb710 kconfig dependency warning
mmc: cb710: remove debugging printk (info duplicated from mmc-core)
mmc: cb710: clear irq handler on init() error path
mmc: cb710: remove unnecessary msleep()
mmc: cb710: implement get_cd() callback
mmc: cb710: partially demystify clock selection
mmc: add a file to debugfs for changing host clock at runtime
mmc: sdhci: allow for eMMC 74 clock generation by controller
mmc: sdhci: highspeed: check for mmc as well as sd cards
mmc: sdhci: Add Moorestown device support
mmc: sdhci: Intel Medfield support
...
Diffstat (limited to 'include/linux/mmc')
-rw-r--r-- | include/linux/mmc/card.h | 6 | ||||
-rw-r--r-- | include/linux/mmc/core.h | 2 | ||||
-rw-r--r-- | include/linux/mmc/host.h | 48 | ||||
-rw-r--r-- | include/linux/mmc/mmc.h | 10 | ||||
-rw-r--r-- | include/linux/mmc/sdhci-pltfm.h | 35 | ||||
-rw-r--r-- | include/linux/mmc/sdhci.h | 144 |
6 files changed, 239 insertions, 6 deletions
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index 6b7525099e56..8ce082781ccb 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h | |||
@@ -48,6 +48,7 @@ struct mmc_ext_csd { | |||
48 | unsigned int sa_timeout; /* Units: 100ns */ | 48 | unsigned int sa_timeout; /* Units: 100ns */ |
49 | unsigned int hs_max_dtr; | 49 | unsigned int hs_max_dtr; |
50 | unsigned int sectors; | 50 | unsigned int sectors; |
51 | unsigned int card_type; | ||
51 | unsigned int hc_erase_size; /* In sectors */ | 52 | unsigned int hc_erase_size; /* In sectors */ |
52 | unsigned int hc_erase_timeout; /* In milliseconds */ | 53 | unsigned int hc_erase_timeout; /* In milliseconds */ |
53 | unsigned int sec_trim_mult; /* Secure trim multiplier */ | 54 | unsigned int sec_trim_mult; /* Secure trim multiplier */ |
@@ -113,6 +114,7 @@ struct mmc_card { | |||
113 | #define MMC_STATE_READONLY (1<<1) /* card is read-only */ | 114 | #define MMC_STATE_READONLY (1<<1) /* card is read-only */ |
114 | #define MMC_STATE_HIGHSPEED (1<<2) /* card is in high speed mode */ | 115 | #define MMC_STATE_HIGHSPEED (1<<2) /* card is in high speed mode */ |
115 | #define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */ | 116 | #define MMC_STATE_BLOCKADDR (1<<3) /* card uses block-addressing */ |
117 | #define MMC_STATE_HIGHSPEED_DDR (1<<4) /* card is in high speed mode */ | ||
116 | unsigned int quirks; /* card quirks */ | 118 | unsigned int quirks; /* card quirks */ |
117 | #define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */ | 119 | #define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */ |
118 | #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */ | 120 | #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */ |
@@ -154,11 +156,13 @@ struct mmc_card { | |||
154 | #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) | 156 | #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) |
155 | #define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED) | 157 | #define mmc_card_highspeed(c) ((c)->state & MMC_STATE_HIGHSPEED) |
156 | #define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR) | 158 | #define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR) |
159 | #define mmc_card_ddr_mode(c) ((c)->state & MMC_STATE_HIGHSPEED_DDR) | ||
157 | 160 | ||
158 | #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) | 161 | #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) |
159 | #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) | 162 | #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) |
160 | #define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED) | 163 | #define mmc_card_set_highspeed(c) ((c)->state |= MMC_STATE_HIGHSPEED) |
161 | #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) | 164 | #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) |
165 | #define mmc_card_set_ddr_mode(c) ((c)->state |= MMC_STATE_HIGHSPEED_DDR) | ||
162 | 166 | ||
163 | static inline int mmc_card_lenient_fn0(const struct mmc_card *c) | 167 | static inline int mmc_card_lenient_fn0(const struct mmc_card *c) |
164 | { | 168 | { |
@@ -173,6 +177,8 @@ static inline int mmc_blksz_for_byte_mode(const struct mmc_card *c) | |||
173 | #define mmc_card_name(c) ((c)->cid.prod_name) | 177 | #define mmc_card_name(c) ((c)->cid.prod_name) |
174 | #define mmc_card_id(c) (dev_name(&(c)->dev)) | 178 | #define mmc_card_id(c) (dev_name(&(c)->dev)) |
175 | 179 | ||
180 | #define mmc_dev_to_card(d) container_of(d, struct mmc_card, dev) | ||
181 | |||
176 | #define mmc_list_to_card(l) container_of(l, struct mmc_card, node) | 182 | #define mmc_list_to_card(l) container_of(l, struct mmc_card, node) |
177 | #define mmc_get_drvdata(c) dev_get_drvdata(&(c)->dev) | 183 | #define mmc_get_drvdata(c) dev_get_drvdata(&(c)->dev) |
178 | #define mmc_set_drvdata(c,d) dev_set_drvdata(&(c)->dev, d) | 184 | #define mmc_set_drvdata(c,d) dev_set_drvdata(&(c)->dev, d) |
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h index 7429033acb66..64e013f1cfb8 100644 --- a/include/linux/mmc/core.h +++ b/include/linux/mmc/core.h | |||
@@ -153,6 +153,8 @@ extern int mmc_can_secure_erase_trim(struct mmc_card *card); | |||
153 | extern int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, | 153 | extern int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, |
154 | unsigned int nr); | 154 | unsigned int nr); |
155 | 155 | ||
156 | extern int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen); | ||
157 | |||
156 | extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *); | 158 | extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *); |
157 | extern unsigned int mmc_align_data_size(struct mmc_card *, unsigned int); | 159 | extern unsigned int mmc_align_data_size(struct mmc_card *, unsigned int); |
158 | 160 | ||
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 1575b52c3bfa..6d87f68ce4b6 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h | |||
@@ -50,6 +50,12 @@ struct mmc_ios { | |||
50 | #define MMC_TIMING_LEGACY 0 | 50 | #define MMC_TIMING_LEGACY 0 |
51 | #define MMC_TIMING_MMC_HS 1 | 51 | #define MMC_TIMING_MMC_HS 1 |
52 | #define MMC_TIMING_SD_HS 2 | 52 | #define MMC_TIMING_SD_HS 2 |
53 | |||
54 | unsigned char ddr; /* dual data rate used */ | ||
55 | |||
56 | #define MMC_SDR_MODE 0 | ||
57 | #define MMC_1_2V_DDR_MODE 1 | ||
58 | #define MMC_1_8V_DDR_MODE 2 | ||
53 | }; | 59 | }; |
54 | 60 | ||
55 | struct mmc_host_ops { | 61 | struct mmc_host_ops { |
@@ -123,6 +129,7 @@ struct mmc_host { | |||
123 | const struct mmc_host_ops *ops; | 129 | const struct mmc_host_ops *ops; |
124 | unsigned int f_min; | 130 | unsigned int f_min; |
125 | unsigned int f_max; | 131 | unsigned int f_max; |
132 | unsigned int f_init; | ||
126 | u32 ocr_avail; | 133 | u32 ocr_avail; |
127 | struct notifier_block pm_notify; | 134 | struct notifier_block pm_notify; |
128 | 135 | ||
@@ -157,13 +164,16 @@ struct mmc_host { | |||
157 | #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */ | 164 | #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */ |
158 | #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */ | 165 | #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */ |
159 | #define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */ | 166 | #define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */ |
167 | #define MMC_CAP_1_8V_DDR (1 << 11) /* can support */ | ||
168 | /* DDR mode at 1.8V */ | ||
169 | #define MMC_CAP_1_2V_DDR (1 << 12) /* can support */ | ||
170 | /* DDR mode at 1.2V */ | ||
160 | 171 | ||
161 | mmc_pm_flag_t pm_caps; /* supported pm features */ | 172 | mmc_pm_flag_t pm_caps; /* supported pm features */ |
162 | 173 | ||
163 | /* host specific block data */ | 174 | /* host specific block data */ |
164 | unsigned int max_seg_size; /* see blk_queue_max_segment_size */ | 175 | unsigned int max_seg_size; /* see blk_queue_max_segment_size */ |
165 | unsigned short max_hw_segs; /* see blk_queue_max_hw_segments */ | 176 | unsigned short max_segs; /* see blk_queue_max_segments */ |
166 | unsigned short max_phys_segs; /* see blk_queue_max_phys_segments */ | ||
167 | unsigned short unused; | 177 | unsigned short unused; |
168 | unsigned int max_req_size; /* maximum number of bytes in one req */ | 178 | unsigned int max_req_size; /* maximum number of bytes in one req */ |
169 | unsigned int max_blk_size; /* maximum size of one mmc block */ | 179 | unsigned int max_blk_size; /* maximum size of one mmc block */ |
@@ -212,6 +222,10 @@ struct mmc_host { | |||
212 | struct led_trigger *led; /* activity led */ | 222 | struct led_trigger *led; /* activity led */ |
213 | #endif | 223 | #endif |
214 | 224 | ||
225 | #ifdef CONFIG_REGULATOR | ||
226 | bool regulator_enabled; /* regulator state */ | ||
227 | #endif | ||
228 | |||
215 | struct dentry *debugfs_root; | 229 | struct dentry *debugfs_root; |
216 | 230 | ||
217 | unsigned long private[0] ____cacheline_aligned; | 231 | unsigned long private[0] ____cacheline_aligned; |
@@ -236,8 +250,8 @@ static inline void *mmc_priv(struct mmc_host *host) | |||
236 | extern int mmc_suspend_host(struct mmc_host *); | 250 | extern int mmc_suspend_host(struct mmc_host *); |
237 | extern int mmc_resume_host(struct mmc_host *); | 251 | extern int mmc_resume_host(struct mmc_host *); |
238 | 252 | ||
239 | extern void mmc_power_save_host(struct mmc_host *host); | 253 | extern int mmc_power_save_host(struct mmc_host *host); |
240 | extern void mmc_power_restore_host(struct mmc_host *host); | 254 | extern int mmc_power_restore_host(struct mmc_host *host); |
241 | 255 | ||
242 | extern void mmc_detect_change(struct mmc_host *, unsigned long delay); | 256 | extern void mmc_detect_change(struct mmc_host *, unsigned long delay); |
243 | extern void mmc_request_done(struct mmc_host *, struct mmc_request *); | 257 | extern void mmc_request_done(struct mmc_host *, struct mmc_request *); |
@@ -250,8 +264,24 @@ static inline void mmc_signal_sdio_irq(struct mmc_host *host) | |||
250 | 264 | ||
251 | struct regulator; | 265 | struct regulator; |
252 | 266 | ||
267 | #ifdef CONFIG_REGULATOR | ||
253 | int mmc_regulator_get_ocrmask(struct regulator *supply); | 268 | int mmc_regulator_get_ocrmask(struct regulator *supply); |
254 | int mmc_regulator_set_ocr(struct regulator *supply, unsigned short vdd_bit); | 269 | int mmc_regulator_set_ocr(struct mmc_host *mmc, |
270 | struct regulator *supply, | ||
271 | unsigned short vdd_bit); | ||
272 | #else | ||
273 | static inline int mmc_regulator_get_ocrmask(struct regulator *supply) | ||
274 | { | ||
275 | return 0; | ||
276 | } | ||
277 | |||
278 | static inline int mmc_regulator_set_ocr(struct mmc_host *mmc, | ||
279 | struct regulator *supply, | ||
280 | unsigned short vdd_bit) | ||
281 | { | ||
282 | return 0; | ||
283 | } | ||
284 | #endif | ||
255 | 285 | ||
256 | int mmc_card_awake(struct mmc_host *host); | 286 | int mmc_card_awake(struct mmc_host *host); |
257 | int mmc_card_sleep(struct mmc_host *host); | 287 | int mmc_card_sleep(struct mmc_host *host); |
@@ -268,5 +298,13 @@ static inline void mmc_set_disable_delay(struct mmc_host *host, | |||
268 | host->disable_delay = disable_delay; | 298 | host->disable_delay = disable_delay; |
269 | } | 299 | } |
270 | 300 | ||
301 | /* Module parameter */ | ||
302 | extern int mmc_assume_removable; | ||
303 | |||
304 | static inline int mmc_card_is_removable(struct mmc_host *host) | ||
305 | { | ||
306 | return !(host->caps & MMC_CAP_NONREMOVABLE) && mmc_assume_removable; | ||
307 | } | ||
308 | |||
271 | #endif | 309 | #endif |
272 | 310 | ||
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h index dd11ae51fb68..956fbd877692 100644 --- a/include/linux/mmc/mmc.h +++ b/include/linux/mmc/mmc.h | |||
@@ -277,11 +277,19 @@ struct _mmc_csd { | |||
277 | 277 | ||
278 | #define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ | 278 | #define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ |
279 | #define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ | 279 | #define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ |
280 | #define EXT_CSD_CARD_TYPE_MASK 0x3 /* Mask out reserved and DDR bits */ | 280 | #define EXT_CSD_CARD_TYPE_MASK 0xF /* Mask out reserved bits */ |
281 | #define EXT_CSD_CARD_TYPE_DDR_1_8V (1<<2) /* Card can run at 52MHz */ | ||
282 | /* DDR mode @1.8V or 3V I/O */ | ||
283 | #define EXT_CSD_CARD_TYPE_DDR_1_2V (1<<3) /* Card can run at 52MHz */ | ||
284 | /* DDR mode @1.2V I/O */ | ||
285 | #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ | ||
286 | | EXT_CSD_CARD_TYPE_DDR_1_2V) | ||
281 | 287 | ||
282 | #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ | 288 | #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ |
283 | #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ | 289 | #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ |
284 | #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ | 290 | #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ |
291 | #define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ | ||
292 | #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ | ||
285 | 293 | ||
286 | #define EXT_CSD_SEC_ER_EN BIT(0) | 294 | #define EXT_CSD_SEC_ER_EN BIT(0) |
287 | #define EXT_CSD_SEC_BD_BLK_EN BIT(2) | 295 | #define EXT_CSD_SEC_BD_BLK_EN BIT(2) |
diff --git a/include/linux/mmc/sdhci-pltfm.h b/include/linux/mmc/sdhci-pltfm.h new file mode 100644 index 000000000000..548d59d404cb --- /dev/null +++ b/include/linux/mmc/sdhci-pltfm.h | |||
@@ -0,0 +1,35 @@ | |||
1 | /* | ||
2 | * Platform data declarations for the sdhci-pltfm driver. | ||
3 | * | ||
4 | * Copyright (c) 2010 MontaVista Software, LLC. | ||
5 | * | ||
6 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or (at | ||
11 | * your option) any later version. | ||
12 | */ | ||
13 | |||
14 | #ifndef _SDHCI_PLTFM_H | ||
15 | #define _SDHCI_PLTFM_H | ||
16 | |||
17 | struct sdhci_ops; | ||
18 | struct sdhci_host; | ||
19 | |||
20 | /** | ||
21 | * struct sdhci_pltfm_data - SDHCI platform-specific information & hooks | ||
22 | * @ops: optional pointer to the platform-provided SDHCI ops | ||
23 | * @quirks: optional SDHCI quirks | ||
24 | * @init: optional hook that is called during device probe, before the | ||
25 | * driver tries to access any SDHCI registers | ||
26 | * @exit: optional hook that is called during device removal | ||
27 | */ | ||
28 | struct sdhci_pltfm_data { | ||
29 | struct sdhci_ops *ops; | ||
30 | unsigned int quirks; | ||
31 | int (*init)(struct sdhci_host *host, struct sdhci_pltfm_data *pdata); | ||
32 | void (*exit)(struct sdhci_host *host); | ||
33 | }; | ||
34 | |||
35 | #endif /* _SDHCI_PLTFM_H */ | ||
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h new file mode 100644 index 000000000000..1fdc673f2396 --- /dev/null +++ b/include/linux/mmc/sdhci.h | |||
@@ -0,0 +1,144 @@ | |||
1 | /* | ||
2 | * linux/include/linux/mmc/sdhci.h - Secure Digital Host Controller Interface | ||
3 | * | ||
4 | * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or (at | ||
9 | * your option) any later version. | ||
10 | */ | ||
11 | #ifndef __SDHCI_H | ||
12 | #define __SDHCI_H | ||
13 | |||
14 | #include <linux/scatterlist.h> | ||
15 | #include <linux/compiler.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/mmc/host.h> | ||
19 | |||
20 | struct sdhci_host { | ||
21 | /* Data set by hardware interface driver */ | ||
22 | const char *hw_name; /* Hardware bus name */ | ||
23 | |||
24 | unsigned int quirks; /* Deviations from spec. */ | ||
25 | |||
26 | /* Controller doesn't honor resets unless we touch the clock register */ | ||
27 | #define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0) | ||
28 | /* Controller has bad caps bits, but really supports DMA */ | ||
29 | #define SDHCI_QUIRK_FORCE_DMA (1<<1) | ||
30 | /* Controller doesn't like to be reset when there is no card inserted. */ | ||
31 | #define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2) | ||
32 | /* Controller doesn't like clearing the power reg before a change */ | ||
33 | #define SDHCI_QUIRK_SINGLE_POWER_WRITE (1<<3) | ||
34 | /* Controller has flaky internal state so reset it on each ios change */ | ||
35 | #define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS (1<<4) | ||
36 | /* Controller has an unusable DMA engine */ | ||
37 | #define SDHCI_QUIRK_BROKEN_DMA (1<<5) | ||
38 | /* Controller has an unusable ADMA engine */ | ||
39 | #define SDHCI_QUIRK_BROKEN_ADMA (1<<6) | ||
40 | /* Controller can only DMA from 32-bit aligned addresses */ | ||
41 | #define SDHCI_QUIRK_32BIT_DMA_ADDR (1<<7) | ||
42 | /* Controller can only DMA chunk sizes that are a multiple of 32 bits */ | ||
43 | #define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<8) | ||
44 | /* Controller can only ADMA chunks that are a multiple of 32 bits */ | ||
45 | #define SDHCI_QUIRK_32BIT_ADMA_SIZE (1<<9) | ||
46 | /* Controller needs to be reset after each request to stay stable */ | ||
47 | #define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<10) | ||
48 | /* Controller needs voltage and power writes to happen separately */ | ||
49 | #define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1<<11) | ||
50 | /* Controller provides an incorrect timeout value for transfers */ | ||
51 | #define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12) | ||
52 | /* Controller has an issue with buffer bits for small transfers */ | ||
53 | #define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13) | ||
54 | /* Controller does not provide transfer-complete interrupt when not busy */ | ||
55 | #define SDHCI_QUIRK_NO_BUSY_IRQ (1<<14) | ||
56 | /* Controller has unreliable card detection */ | ||
57 | #define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1<<15) | ||
58 | /* Controller reports inverted write-protect state */ | ||
59 | #define SDHCI_QUIRK_INVERTED_WRITE_PROTECT (1<<16) | ||
60 | /* Controller has nonstandard clock management */ | ||
61 | #define SDHCI_QUIRK_NONSTANDARD_CLOCK (1<<17) | ||
62 | /* Controller does not like fast PIO transfers */ | ||
63 | #define SDHCI_QUIRK_PIO_NEEDS_DELAY (1<<18) | ||
64 | /* Controller losing signal/interrupt enable states after reset */ | ||
65 | #define SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET (1<<19) | ||
66 | /* Controller has to be forced to use block size of 2048 bytes */ | ||
67 | #define SDHCI_QUIRK_FORCE_BLK_SZ_2048 (1<<20) | ||
68 | /* Controller cannot do multi-block transfers */ | ||
69 | #define SDHCI_QUIRK_NO_MULTIBLOCK (1<<21) | ||
70 | /* Controller can only handle 1-bit data transfers */ | ||
71 | #define SDHCI_QUIRK_FORCE_1_BIT_DATA (1<<22) | ||
72 | /* Controller needs 10ms delay between applying power and clock */ | ||
73 | #define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23) | ||
74 | /* Controller uses SDCLK instead of TMCLK for data timeouts */ | ||
75 | #define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1<<24) | ||
76 | /* Controller reports wrong base clock capability */ | ||
77 | #define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1<<25) | ||
78 | /* Controller cannot support End Attribute in NOP ADMA descriptor */ | ||
79 | #define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC (1<<26) | ||
80 | /* Controller is missing device caps. Use caps provided by host */ | ||
81 | #define SDHCI_QUIRK_MISSING_CAPS (1<<27) | ||
82 | /* Controller uses Auto CMD12 command to stop the transfer */ | ||
83 | #define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 (1<<28) | ||
84 | /* Controller doesn't have HISPD bit field in HI-SPEED SD card */ | ||
85 | #define SDHCI_QUIRK_NO_HISPD_BIT (1<<29) | ||
86 | |||
87 | int irq; /* Device IRQ */ | ||
88 | void __iomem *ioaddr; /* Mapped address */ | ||
89 | |||
90 | const struct sdhci_ops *ops; /* Low level hw interface */ | ||
91 | |||
92 | struct regulator *vmmc; /* Power regulator */ | ||
93 | |||
94 | /* Internal data */ | ||
95 | struct mmc_host *mmc; /* MMC structure */ | ||
96 | u64 dma_mask; /* custom DMA mask */ | ||
97 | |||
98 | #if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE) | ||
99 | struct led_classdev led; /* LED control */ | ||
100 | char led_name[32]; | ||
101 | #endif | ||
102 | |||
103 | spinlock_t lock; /* Mutex */ | ||
104 | |||
105 | int flags; /* Host attributes */ | ||
106 | #define SDHCI_USE_SDMA (1<<0) /* Host is SDMA capable */ | ||
107 | #define SDHCI_USE_ADMA (1<<1) /* Host is ADMA capable */ | ||
108 | #define SDHCI_REQ_USE_DMA (1<<2) /* Use DMA for this req. */ | ||
109 | #define SDHCI_DEVICE_DEAD (1<<3) /* Device unresponsive */ | ||
110 | |||
111 | unsigned int version; /* SDHCI spec. version */ | ||
112 | |||
113 | unsigned int max_clk; /* Max possible freq (MHz) */ | ||
114 | unsigned int timeout_clk; /* Timeout freq (KHz) */ | ||
115 | |||
116 | unsigned int clock; /* Current clock (MHz) */ | ||
117 | u8 pwr; /* Current voltage */ | ||
118 | |||
119 | struct mmc_request *mrq; /* Current request */ | ||
120 | struct mmc_command *cmd; /* Current command */ | ||
121 | struct mmc_data *data; /* Current data request */ | ||
122 | unsigned int data_early:1; /* Data finished before cmd */ | ||
123 | |||
124 | struct sg_mapping_iter sg_miter; /* SG state for PIO */ | ||
125 | unsigned int blocks; /* remaining PIO blocks */ | ||
126 | |||
127 | int sg_count; /* Mapped sg entries */ | ||
128 | |||
129 | u8 *adma_desc; /* ADMA descriptor table */ | ||
130 | u8 *align_buffer; /* Bounce buffer */ | ||
131 | |||
132 | dma_addr_t adma_addr; /* Mapped ADMA descr. table */ | ||
133 | dma_addr_t align_addr; /* Mapped bounce buffer */ | ||
134 | |||
135 | struct tasklet_struct card_tasklet; /* Tasklet structures */ | ||
136 | struct tasklet_struct finish_tasklet; | ||
137 | |||
138 | struct timer_list timer; /* Timer for timeouts */ | ||
139 | |||
140 | unsigned int caps; /* Alternative capabilities */ | ||
141 | |||
142 | unsigned long private[0] ____cacheline_aligned; | ||
143 | }; | ||
144 | #endif /* __SDHCI_H */ | ||