mmc: sdhci-pci: add runtime pm support

Ths patch allows runtime PM for sdhci-pci, runtime suspending after
inactivity of 50ms and ensuring runtime resume before SDHC registers
are accessed.  During runtime suspend, interrupts are masked.
The host controller state is restored at runtime resume.

For Medfield, the host controller's card detect mechanism is
supplanted by an always-on GPIO which provides for card detect wake-up.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>

1 files changed, 8 insertions, 0 deletions

diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index 5666f3abfab7..e4b69353678d 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -88,6 +88,10 @@ struct sdhci_host {
 /* The read-only detection via SDHCI_PRESENT_STATE register is unstable */
 #define SDHCI_QUIRK_UNSTABLE_RO_DETECT                  (1<<31)
 
+        unsigned int quirks2;   /* More deviations from spec. */
+
+#define SDHCI_QUIRK2_OWN_CARD_DETECTION                 (1<<0)
+
         int irq;                /* Device IRQ */
         void __iomem *ioaddr;   /* Mapped address */
 
@@ -115,6 +119,8 @@ struct sdhci_host {
 #define SDHCI_NEEDS_RETUNING    (1<<5)  /* Host needs retuning */
 #define SDHCI_AUTO_CMD12        (1<<6)  /* Auto CMD12 support */
 #define SDHCI_AUTO_CMD23        (1<<7)  /* Auto CMD23 support */
+#define SDHCI_PV_ENABLED        (1<<8)  /* Preset value enabled */
+#define SDHCI_SDIO_IRQ_ENABLED  (1<<9)  /* SDIO irq enabled */
 
         unsigned int version;   /* SDHCI spec. version */
 
@@ -125,6 +131,8 @@ struct sdhci_host {
         unsigned int clock;     /* Current clock (MHz) */
         u8 pwr;                 /* Current voltage */
 
+        bool runtime_suspended; /* Host is runtime suspended */
+
         struct mmc_request *mrq;        /* Current request */
         struct mmc_command *cmd;        /* Current command */
         struct mmc_data *data;  /* Current data request */