diff options
author | Pierre Ossman <drzeus@drzeus.cx> | 2006-12-24 16:46:55 -0500 |
---|---|---|
committer | Pierre Ossman <drzeus@drzeus.cx> | 2007-05-01 07:04:18 -0400 |
commit | da7fbe58d2d347e95af699ddf04d885be6362bbe (patch) | |
tree | 560df47c41bb64ace46f82f9fa5e2fabc8bafbab /include/linux/mmc/protocol.h | |
parent | aaac1b470bd0dccb30912356617069dc6199cc80 (diff) |
mmc: Separate out protocol ops
Move protocol operations and definitions into their own files
in an effort to separate protocol handling and bus
arbitration more clearly.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'include/linux/mmc/protocol.h')
-rw-r--r-- | include/linux/mmc/protocol.h | 307 |
1 files changed, 0 insertions, 307 deletions
diff --git a/include/linux/mmc/protocol.h b/include/linux/mmc/protocol.h deleted file mode 100644 index 3ca91a6fc23f..000000000000 --- a/include/linux/mmc/protocol.h +++ /dev/null | |||
@@ -1,307 +0,0 @@ | |||
1 | /* | ||
2 | * Header for MultiMediaCard (MMC) | ||
3 | * | ||
4 | * Copyright 2002 Hewlett-Packard Company | ||
5 | * | ||
6 | * Use consistent with the GNU GPL is permitted, | ||
7 | * provided that this copyright notice is | ||
8 | * preserved in its entirety in all copies and derived works. | ||
9 | * | ||
10 | * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, | ||
11 | * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS | ||
12 | * FITNESS FOR ANY PARTICULAR PURPOSE. | ||
13 | * | ||
14 | * Many thanks to Alessandro Rubini and Jonathan Corbet! | ||
15 | * | ||
16 | * Based strongly on code by: | ||
17 | * | ||
18 | * Author: Yong-iL Joh <tolkien@mizi.com> | ||
19 | * Date : $Date: 2002/06/18 12:37:30 $ | ||
20 | * | ||
21 | * Author: Andrew Christian | ||
22 | * 15 May 2002 | ||
23 | */ | ||
24 | |||
25 | #ifndef MMC_MMC_PROTOCOL_H | ||
26 | #define MMC_MMC_PROTOCOL_H | ||
27 | |||
28 | /* Standard MMC commands (4.1) type argument response */ | ||
29 | /* class 1 */ | ||
30 | #define MMC_GO_IDLE_STATE 0 /* bc */ | ||
31 | #define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ | ||
32 | #define MMC_ALL_SEND_CID 2 /* bcr R2 */ | ||
33 | #define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ | ||
34 | #define MMC_SET_DSR 4 /* bc [31:16] RCA */ | ||
35 | #define MMC_SWITCH 6 /* ac [31:0] See below R1b */ | ||
36 | #define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ | ||
37 | #define MMC_SEND_EXT_CSD 8 /* adtc R1 */ | ||
38 | #define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ | ||
39 | #define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ | ||
40 | #define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ | ||
41 | #define MMC_STOP_TRANSMISSION 12 /* ac R1b */ | ||
42 | #define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ | ||
43 | #define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ | ||
44 | |||
45 | /* class 2 */ | ||
46 | #define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ | ||
47 | #define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ | ||
48 | #define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ | ||
49 | |||
50 | /* class 3 */ | ||
51 | #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ | ||
52 | |||
53 | /* class 4 */ | ||
54 | #define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ | ||
55 | #define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */ | ||
56 | #define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */ | ||
57 | #define MMC_PROGRAM_CID 26 /* adtc R1 */ | ||
58 | #define MMC_PROGRAM_CSD 27 /* adtc R1 */ | ||
59 | |||
60 | /* class 6 */ | ||
61 | #define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */ | ||
62 | #define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */ | ||
63 | #define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */ | ||
64 | |||
65 | /* class 5 */ | ||
66 | #define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ | ||
67 | #define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ | ||
68 | #define MMC_ERASE 38 /* ac R1b */ | ||
69 | |||
70 | /* class 9 */ | ||
71 | #define MMC_FAST_IO 39 /* ac <Complex> R4 */ | ||
72 | #define MMC_GO_IRQ_STATE 40 /* bcr R5 */ | ||
73 | |||
74 | /* class 7 */ | ||
75 | #define MMC_LOCK_UNLOCK 42 /* adtc R1b */ | ||
76 | |||
77 | /* class 8 */ | ||
78 | #define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ | ||
79 | #define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */ | ||
80 | |||
81 | /* SD commands type argument response */ | ||
82 | /* class 0 */ | ||
83 | /* This is basically the same command as for MMC with some quirks. */ | ||
84 | #define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */ | ||
85 | #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ | ||
86 | |||
87 | /* class 10 */ | ||
88 | #define SD_SWITCH 6 /* adtc [31:0] See below R1 */ | ||
89 | |||
90 | /* Application commands */ | ||
91 | #define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ | ||
92 | #define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */ | ||
93 | #define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */ | ||
94 | #define SD_APP_SEND_SCR 51 /* adtc R1 */ | ||
95 | |||
96 | /* | ||
97 | * MMC_SWITCH argument format: | ||
98 | * | ||
99 | * [31:26] Always 0 | ||
100 | * [25:24] Access Mode | ||
101 | * [23:16] Location of target Byte in EXT_CSD | ||
102 | * [15:08] Value Byte | ||
103 | * [07:03] Always 0 | ||
104 | * [02:00] Command Set | ||
105 | */ | ||
106 | |||
107 | /* | ||
108 | * SD_SWITCH argument format: | ||
109 | * | ||
110 | * [31] Check (0) or switch (1) | ||
111 | * [30:24] Reserved (0) | ||
112 | * [23:20] Function group 6 | ||
113 | * [19:16] Function group 5 | ||
114 | * [15:12] Function group 4 | ||
115 | * [11:8] Function group 3 | ||
116 | * [7:4] Function group 2 | ||
117 | * [3:0] Function group 1 | ||
118 | */ | ||
119 | |||
120 | /* | ||
121 | * SD_SEND_IF_COND argument format: | ||
122 | * | ||
123 | * [31:12] Reserved (0) | ||
124 | * [11:8] Host Voltage Supply Flags | ||
125 | * [7:0] Check Pattern (0xAA) | ||
126 | */ | ||
127 | |||
128 | /* | ||
129 | MMC status in R1 | ||
130 | Type | ||
131 | e : error bit | ||
132 | s : status bit | ||
133 | r : detected and set for the actual command response | ||
134 | x : detected and set during command execution. the host must poll | ||
135 | the card by sending status command in order to read these bits. | ||
136 | Clear condition | ||
137 | a : according to the card state | ||
138 | b : always related to the previous command. Reception of | ||
139 | a valid command will clear it (with a delay of one command) | ||
140 | c : clear by read | ||
141 | */ | ||
142 | |||
143 | #define R1_OUT_OF_RANGE (1 << 31) /* er, c */ | ||
144 | #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */ | ||
145 | #define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */ | ||
146 | #define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */ | ||
147 | #define R1_ERASE_PARAM (1 << 27) /* ex, c */ | ||
148 | #define R1_WP_VIOLATION (1 << 26) /* erx, c */ | ||
149 | #define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */ | ||
150 | #define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */ | ||
151 | #define R1_COM_CRC_ERROR (1 << 23) /* er, b */ | ||
152 | #define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */ | ||
153 | #define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */ | ||
154 | #define R1_CC_ERROR (1 << 20) /* erx, c */ | ||
155 | #define R1_ERROR (1 << 19) /* erx, c */ | ||
156 | #define R1_UNDERRUN (1 << 18) /* ex, c */ | ||
157 | #define R1_OVERRUN (1 << 17) /* ex, c */ | ||
158 | #define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */ | ||
159 | #define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */ | ||
160 | #define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ | ||
161 | #define R1_ERASE_RESET (1 << 13) /* sr, c */ | ||
162 | #define R1_STATUS(x) (x & 0xFFFFE000) | ||
163 | #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ | ||
164 | #define R1_READY_FOR_DATA (1 << 8) /* sx, a */ | ||
165 | #define R1_APP_CMD (1 << 5) /* sr, c */ | ||
166 | |||
167 | /* These are unpacked versions of the actual responses */ | ||
168 | |||
169 | struct _mmc_csd { | ||
170 | u8 csd_structure; | ||
171 | u8 spec_vers; | ||
172 | u8 taac; | ||
173 | u8 nsac; | ||
174 | u8 tran_speed; | ||
175 | u16 ccc; | ||
176 | u8 read_bl_len; | ||
177 | u8 read_bl_partial; | ||
178 | u8 write_blk_misalign; | ||
179 | u8 read_blk_misalign; | ||
180 | u8 dsr_imp; | ||
181 | u16 c_size; | ||
182 | u8 vdd_r_curr_min; | ||
183 | u8 vdd_r_curr_max; | ||
184 | u8 vdd_w_curr_min; | ||
185 | u8 vdd_w_curr_max; | ||
186 | u8 c_size_mult; | ||
187 | union { | ||
188 | struct { /* MMC system specification version 3.1 */ | ||
189 | u8 erase_grp_size; | ||
190 | u8 erase_grp_mult; | ||
191 | } v31; | ||
192 | struct { /* MMC system specification version 2.2 */ | ||
193 | u8 sector_size; | ||
194 | u8 erase_grp_size; | ||
195 | } v22; | ||
196 | } erase; | ||
197 | u8 wp_grp_size; | ||
198 | u8 wp_grp_enable; | ||
199 | u8 default_ecc; | ||
200 | u8 r2w_factor; | ||
201 | u8 write_bl_len; | ||
202 | u8 write_bl_partial; | ||
203 | u8 file_format_grp; | ||
204 | u8 copy; | ||
205 | u8 perm_write_protect; | ||
206 | u8 tmp_write_protect; | ||
207 | u8 file_format; | ||
208 | u8 ecc; | ||
209 | }; | ||
210 | |||
211 | /* | ||
212 | * OCR bits are mostly in host.h | ||
213 | */ | ||
214 | #define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */ | ||
215 | |||
216 | /* | ||
217 | * Card Command Classes (CCC) | ||
218 | */ | ||
219 | #define CCC_BASIC (1<<0) /* (0) Basic protocol functions */ | ||
220 | /* (CMD0,1,2,3,4,7,9,10,12,13,15) */ | ||
221 | #define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */ | ||
222 | /* (CMD11) */ | ||
223 | #define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */ | ||
224 | /* (CMD16,17,18) */ | ||
225 | #define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */ | ||
226 | /* (CMD20) */ | ||
227 | #define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */ | ||
228 | /* (CMD16,24,25,26,27) */ | ||
229 | #define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */ | ||
230 | /* (CMD32,33,34,35,36,37,38,39) */ | ||
231 | #define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */ | ||
232 | /* (CMD28,29,30) */ | ||
233 | #define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */ | ||
234 | /* (CMD16,CMD42) */ | ||
235 | #define CCC_APP_SPEC (1<<8) /* (8) Application specific */ | ||
236 | /* (CMD55,56,57,ACMD*) */ | ||
237 | #define CCC_IO_MODE (1<<9) /* (9) I/O mode */ | ||
238 | /* (CMD5,39,40,52,53) */ | ||
239 | #define CCC_SWITCH (1<<10) /* (10) High speed switch */ | ||
240 | /* (CMD6,34,35,36,37,50) */ | ||
241 | /* (11) Reserved */ | ||
242 | /* (CMD?) */ | ||
243 | |||
244 | /* | ||
245 | * CSD field definitions | ||
246 | */ | ||
247 | |||
248 | #define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ | ||
249 | #define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ | ||
250 | #define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 - 3.2 - 3.31 - 4.0 - 4.1 */ | ||
251 | #define CSD_STRUCT_EXT_CSD 3 /* Version is coded in CSD_STRUCTURE in EXT_CSD */ | ||
252 | |||
253 | #define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ | ||
254 | #define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ | ||
255 | #define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ | ||
256 | #define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 - 3.2 - 3.31 */ | ||
257 | #define CSD_SPEC_VER_4 4 /* Implements system specification 4.0 - 4.1 */ | ||
258 | |||
259 | /* | ||
260 | * EXT_CSD fields | ||
261 | */ | ||
262 | |||
263 | #define EXT_CSD_BUS_WIDTH 183 /* R/W */ | ||
264 | #define EXT_CSD_HS_TIMING 185 /* R/W */ | ||
265 | #define EXT_CSD_CARD_TYPE 196 /* RO */ | ||
266 | #define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ | ||
267 | |||
268 | /* | ||
269 | * EXT_CSD field definitions | ||
270 | */ | ||
271 | |||
272 | #define EXT_CSD_CMD_SET_NORMAL (1<<0) | ||
273 | #define EXT_CSD_CMD_SET_SECURE (1<<1) | ||
274 | #define EXT_CSD_CMD_SET_CPSECURE (1<<2) | ||
275 | |||
276 | #define EXT_CSD_CARD_TYPE_26 (1<<0) /* Card can run at 26MHz */ | ||
277 | #define EXT_CSD_CARD_TYPE_52 (1<<1) /* Card can run at 52MHz */ | ||
278 | |||
279 | #define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ | ||
280 | #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ | ||
281 | #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ | ||
282 | |||
283 | /* | ||
284 | * MMC_SWITCH access modes | ||
285 | */ | ||
286 | |||
287 | #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ | ||
288 | #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits which are 1 in value */ | ||
289 | #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits which are 1 in value */ | ||
290 | #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target to value */ | ||
291 | |||
292 | /* | ||
293 | * SCR field definitions | ||
294 | */ | ||
295 | |||
296 | #define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */ | ||
297 | #define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */ | ||
298 | #define SCR_SPEC_VER_2 2 /* Implements system specification 2.00 */ | ||
299 | |||
300 | /* | ||
301 | * SD bus widths | ||
302 | */ | ||
303 | #define SD_BUS_WIDTH_1 0 | ||
304 | #define SD_BUS_WIDTH_4 2 | ||
305 | |||
306 | #endif /* MMC_MMC_PROTOCOL_H */ | ||
307 | |||