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authorEli Cohen <eli@dev.mellanox.co.il>2014-01-14 10:45:12 -0500
committerRoland Dreier <roland@purestorage.com>2014-01-14 16:54:23 -0500
commitc1be5232d21de68f46637e617225b9b7c586451a (patch)
treeca552be072b1ec232a4ca7b1d3154fd6b5f4946f /include/linux/mlx5
parent24e42754f676d34e5c26d6b7b30f36df8004ec08 (diff)
IB/mlx5: Fix micro UAR allocator
The micro UAR (uuar) allocator had a bug which resulted from the fact that in each UAR we only have two micro UARs avaialable, those at index 0 and 1. This patch defines iterators to aid in traversing the list of available micro UARs when allocating a uuar. In addition, change the logic in create_user_qp() so that if high class allocation fails (high class means lower latency), we revert to medium class and not to the low class. Signed-off-by: Eli Cohen <eli@mellanox.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'include/linux/mlx5')
-rw-r--r--include/linux/mlx5/device.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index da78875807fc..2c1c62e339ca 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -104,9 +104,10 @@ enum {
104}; 104};
105 105
106enum { 106enum {
107 MLX5_BF_REGS_PER_PAGE = 4, 107 MLX5_BF_REGS_PER_PAGE = 4,
108 MLX5_MAX_UAR_PAGES = 1 << 8, 108 MLX5_MAX_UAR_PAGES = 1 << 8,
109 MLX5_MAX_UUARS = MLX5_MAX_UAR_PAGES * MLX5_BF_REGS_PER_PAGE, 109 MLX5_NON_FP_BF_REGS_PER_PAGE = 2,
110 MLX5_MAX_UUARS = MLX5_MAX_UAR_PAGES * MLX5_NON_FP_BF_REGS_PER_PAGE,
110}; 111};
111 112
112enum { 113enum {