diff options
author | H. Peter Anvin <hpa@linux.intel.com> | 2013-04-20 12:16:44 -0400 |
---|---|---|
committer | H. Peter Anvin <hpa@linux.intel.com> | 2013-04-20 12:16:44 -0400 |
commit | f53f292eeaa234615c31a1306babe703fc4263f2 (patch) | |
tree | 707b0933a20f7dc05495e974243a23b5c9f8c918 /include/linux/mlx4 | |
parent | 15b9c359f288b09003cb70f7ed204affc0c6614d (diff) | |
parent | a9499fa7cd3fd4824a7202d00c766b269fa3bda6 (diff) |
Merge remote-tracking branch 'efi/chainsaw' into x86/efi
Resolved Conflicts:
drivers/firmware/efivars.c
fs/efivarsfs/file.c
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'include/linux/mlx4')
-rw-r--r-- | include/linux/mlx4/device.h | 30 | ||||
-rw-r--r-- | include/linux/mlx4/qp.h | 19 |
2 files changed, 35 insertions, 14 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 20ea939c22a6..811f91cf5e8c 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h | |||
@@ -150,7 +150,8 @@ enum { | |||
150 | MLX4_DEV_CAP_FLAG2_RSS = 1LL << 0, | 150 | MLX4_DEV_CAP_FLAG2_RSS = 1LL << 0, |
151 | MLX4_DEV_CAP_FLAG2_RSS_TOP = 1LL << 1, | 151 | MLX4_DEV_CAP_FLAG2_RSS_TOP = 1LL << 1, |
152 | MLX4_DEV_CAP_FLAG2_RSS_XOR = 1LL << 2, | 152 | MLX4_DEV_CAP_FLAG2_RSS_XOR = 1LL << 2, |
153 | MLX4_DEV_CAP_FLAG2_FS_EN = 1LL << 3 | 153 | MLX4_DEV_CAP_FLAG2_FS_EN = 1LL << 3, |
154 | MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN = 1LL << 4 | ||
154 | }; | 155 | }; |
155 | 156 | ||
156 | enum { | 157 | enum { |
@@ -170,6 +171,7 @@ enum { | |||
170 | #define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90) | 171 | #define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90) |
171 | 172 | ||
172 | enum { | 173 | enum { |
174 | MLX4_BMME_FLAG_WIN_TYPE_2B = 1 << 1, | ||
173 | MLX4_BMME_FLAG_LOCAL_INV = 1 << 6, | 175 | MLX4_BMME_FLAG_LOCAL_INV = 1 << 6, |
174 | MLX4_BMME_FLAG_REMOTE_INV = 1 << 7, | 176 | MLX4_BMME_FLAG_REMOTE_INV = 1 << 7, |
175 | MLX4_BMME_FLAG_TYPE_2_WIN = 1 << 9, | 177 | MLX4_BMME_FLAG_TYPE_2_WIN = 1 << 9, |
@@ -237,7 +239,8 @@ enum { | |||
237 | MLX4_PERM_LOCAL_WRITE = 1 << 11, | 239 | MLX4_PERM_LOCAL_WRITE = 1 << 11, |
238 | MLX4_PERM_REMOTE_READ = 1 << 12, | 240 | MLX4_PERM_REMOTE_READ = 1 << 12, |
239 | MLX4_PERM_REMOTE_WRITE = 1 << 13, | 241 | MLX4_PERM_REMOTE_WRITE = 1 << 13, |
240 | MLX4_PERM_ATOMIC = 1 << 14 | 242 | MLX4_PERM_ATOMIC = 1 << 14, |
243 | MLX4_PERM_BIND_MW = 1 << 15, | ||
241 | }; | 244 | }; |
242 | 245 | ||
243 | enum { | 246 | enum { |
@@ -503,6 +506,18 @@ struct mlx4_mr { | |||
503 | int enabled; | 506 | int enabled; |
504 | }; | 507 | }; |
505 | 508 | ||
509 | enum mlx4_mw_type { | ||
510 | MLX4_MW_TYPE_1 = 1, | ||
511 | MLX4_MW_TYPE_2 = 2, | ||
512 | }; | ||
513 | |||
514 | struct mlx4_mw { | ||
515 | u32 key; | ||
516 | u32 pd; | ||
517 | enum mlx4_mw_type type; | ||
518 | int enabled; | ||
519 | }; | ||
520 | |||
506 | struct mlx4_fmr { | 521 | struct mlx4_fmr { |
507 | struct mlx4_mr mr; | 522 | struct mlx4_mr mr; |
508 | struct mlx4_mpt_entry *mpt; | 523 | struct mlx4_mpt_entry *mpt; |
@@ -801,8 +816,12 @@ u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt); | |||
801 | 816 | ||
802 | int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access, | 817 | int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access, |
803 | int npages, int page_shift, struct mlx4_mr *mr); | 818 | int npages, int page_shift, struct mlx4_mr *mr); |
804 | void mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr); | 819 | int mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr); |
805 | int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr); | 820 | int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr); |
821 | int mlx4_mw_alloc(struct mlx4_dev *dev, u32 pd, enum mlx4_mw_type type, | ||
822 | struct mlx4_mw *mw); | ||
823 | void mlx4_mw_free(struct mlx4_dev *dev, struct mlx4_mw *mw); | ||
824 | int mlx4_mw_enable(struct mlx4_dev *dev, struct mlx4_mw *mw); | ||
806 | int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, | 825 | int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, |
807 | int start_index, int npages, u64 *page_list); | 826 | int start_index, int npages, u64 *page_list); |
808 | int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, | 827 | int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, |
@@ -955,9 +974,8 @@ int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mo | |||
955 | 974 | ||
956 | int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac); | 975 | int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac); |
957 | void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); | 976 | void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); |
958 | int mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac); | 977 | int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port); |
959 | int mlx4_get_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int *qpn); | 978 | int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac); |
960 | void mlx4_put_eth_qp(struct mlx4_dev *dev, u8 port, u64 mac, int qpn); | ||
961 | void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap); | 979 | void mlx4_set_stats_bitmap(struct mlx4_dev *dev, u64 *stats_bitmap); |
962 | int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, | 980 | int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, |
963 | u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx); | 981 | u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx); |
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h index 4b4ad6ffef92..67f46ad6920a 100644 --- a/include/linux/mlx4/qp.h +++ b/include/linux/mlx4/qp.h | |||
@@ -265,6 +265,11 @@ struct mlx4_wqe_lso_seg { | |||
265 | __be32 header[0]; | 265 | __be32 header[0]; |
266 | }; | 266 | }; |
267 | 267 | ||
268 | enum mlx4_wqe_bind_seg_flags2 { | ||
269 | MLX4_WQE_BIND_ZERO_BASED = (1 << 30), | ||
270 | MLX4_WQE_BIND_TYPE_2 = (1 << 31), | ||
271 | }; | ||
272 | |||
268 | struct mlx4_wqe_bind_seg { | 273 | struct mlx4_wqe_bind_seg { |
269 | __be32 flags1; | 274 | __be32 flags1; |
270 | __be32 flags2; | 275 | __be32 flags2; |
@@ -277,9 +282,9 @@ struct mlx4_wqe_bind_seg { | |||
277 | enum { | 282 | enum { |
278 | MLX4_WQE_FMR_PERM_LOCAL_READ = 1 << 27, | 283 | MLX4_WQE_FMR_PERM_LOCAL_READ = 1 << 27, |
279 | MLX4_WQE_FMR_PERM_LOCAL_WRITE = 1 << 28, | 284 | MLX4_WQE_FMR_PERM_LOCAL_WRITE = 1 << 28, |
280 | MLX4_WQE_FMR_PERM_REMOTE_READ = 1 << 29, | 285 | MLX4_WQE_FMR_AND_BIND_PERM_REMOTE_READ = 1 << 29, |
281 | MLX4_WQE_FMR_PERM_REMOTE_WRITE = 1 << 30, | 286 | MLX4_WQE_FMR_AND_BIND_PERM_REMOTE_WRITE = 1 << 30, |
282 | MLX4_WQE_FMR_PERM_ATOMIC = 1 << 31 | 287 | MLX4_WQE_FMR_AND_BIND_PERM_ATOMIC = 1 << 31 |
283 | }; | 288 | }; |
284 | 289 | ||
285 | struct mlx4_wqe_fmr_seg { | 290 | struct mlx4_wqe_fmr_seg { |
@@ -304,12 +309,10 @@ struct mlx4_wqe_fmr_ext_seg { | |||
304 | }; | 309 | }; |
305 | 310 | ||
306 | struct mlx4_wqe_local_inval_seg { | 311 | struct mlx4_wqe_local_inval_seg { |
307 | __be32 flags; | 312 | u64 reserved1; |
308 | u32 reserved1; | ||
309 | __be32 mem_key; | 313 | __be32 mem_key; |
310 | u32 reserved2[2]; | 314 | u32 reserved2; |
311 | __be32 guest_id; | 315 | u64 reserved3[2]; |
312 | __be64 pa; | ||
313 | }; | 316 | }; |
314 | 317 | ||
315 | struct mlx4_wqe_raddr_seg { | 318 | struct mlx4_wqe_raddr_seg { |