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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 13:51:38 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 13:51:38 -0400 |
commit | f470f8d4e702593ee1d0852871ad80373bce707b (patch) | |
tree | 85a67e65c5e5b9777639bd8f4c763a4cf8787e0e /include/linux/mlx4 | |
parent | dc47d3810cdcb4f32bfa31d50f26af97aced0638 (diff) | |
parent | 504255f8d0480cf293962adf4bc3aecac645ae71 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband: (62 commits)
mlx4_core: Deprecate log_num_vlan module param
IB/mlx4: Don't set VLAN in IBoE WQEs' control segment
IB/mlx4: Enable 4K mtu for IBoE
RDMA/cxgb4: Mark QP in error before disabling the queue in firmware
RDMA/cxgb4: Serialize calls to CQ's comp_handler
RDMA/cxgb3: Serialize calls to CQ's comp_handler
IB/qib: Fix issue with link states and QSFP cables
IB/mlx4: Configure extended active speeds
mlx4_core: Add extended port capabilities support
IB/qib: Hold links until tuning data is available
IB/qib: Clean up checkpatch issue
IB/qib: Remove s_lock around header validation
IB/qib: Precompute timeout jiffies to optimize latency
IB/qib: Use RCU for qpn lookup
IB/qib: Eliminate divide/mod in converting idx to egr buf pointer
IB/qib: Decode path MTU optimization
IB/qib: Optimize RC/UC code by IB operation
IPoIB: Use the right function to do DMA unmap pages
RDMA/cxgb4: Use correct QID in insert_recv_cqe()
RDMA/cxgb4: Make sure flush CQ entries are collected on connection close
...
Diffstat (limited to 'include/linux/mlx4')
-rw-r--r-- | include/linux/mlx4/device.h | 16 | ||||
-rw-r--r-- | include/linux/mlx4/qp.h | 3 |
2 files changed, 16 insertions, 3 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index 2366f94a095a..84b0b1848f17 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h | |||
@@ -61,6 +61,7 @@ enum { | |||
61 | MLX4_DEV_CAP_FLAG_RC = 1LL << 0, | 61 | MLX4_DEV_CAP_FLAG_RC = 1LL << 0, |
62 | MLX4_DEV_CAP_FLAG_UC = 1LL << 1, | 62 | MLX4_DEV_CAP_FLAG_UC = 1LL << 1, |
63 | MLX4_DEV_CAP_FLAG_UD = 1LL << 2, | 63 | MLX4_DEV_CAP_FLAG_UD = 1LL << 2, |
64 | MLX4_DEV_CAP_FLAG_XRC = 1LL << 3, | ||
64 | MLX4_DEV_CAP_FLAG_SRQ = 1LL << 6, | 65 | MLX4_DEV_CAP_FLAG_SRQ = 1LL << 6, |
65 | MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1LL << 7, | 66 | MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1LL << 7, |
66 | MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8, | 67 | MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8, |
@@ -83,6 +84,12 @@ enum { | |||
83 | MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48 | 84 | MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48 |
84 | }; | 85 | }; |
85 | 86 | ||
87 | #define MLX4_ATTR_EXTENDED_PORT_INFO cpu_to_be16(0xff90) | ||
88 | |||
89 | enum { | ||
90 | MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO = 1 << 0 | ||
91 | }; | ||
92 | |||
86 | enum { | 93 | enum { |
87 | MLX4_BMME_FLAG_LOCAL_INV = 1 << 6, | 94 | MLX4_BMME_FLAG_LOCAL_INV = 1 << 6, |
88 | MLX4_BMME_FLAG_REMOTE_INV = 1 << 7, | 95 | MLX4_BMME_FLAG_REMOTE_INV = 1 << 7, |
@@ -257,6 +264,8 @@ struct mlx4_caps { | |||
257 | int num_qp_per_mgm; | 264 | int num_qp_per_mgm; |
258 | int num_pds; | 265 | int num_pds; |
259 | int reserved_pds; | 266 | int reserved_pds; |
267 | int max_xrcds; | ||
268 | int reserved_xrcds; | ||
260 | int mtt_entry_sz; | 269 | int mtt_entry_sz; |
261 | u32 max_msg_sz; | 270 | u32 max_msg_sz; |
262 | u32 page_size_cap; | 271 | u32 page_size_cap; |
@@ -277,6 +286,7 @@ struct mlx4_caps { | |||
277 | u32 port_mask; | 286 | u32 port_mask; |
278 | enum mlx4_port_type possible_type[MLX4_MAX_PORTS + 1]; | 287 | enum mlx4_port_type possible_type[MLX4_MAX_PORTS + 1]; |
279 | u32 max_counters; | 288 | u32 max_counters; |
289 | u8 ext_port_cap[MLX4_MAX_PORTS + 1]; | ||
280 | }; | 290 | }; |
281 | 291 | ||
282 | struct mlx4_buf_list { | 292 | struct mlx4_buf_list { |
@@ -500,6 +510,8 @@ static inline void *mlx4_buf_offset(struct mlx4_buf *buf, int offset) | |||
500 | 510 | ||
501 | int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn); | 511 | int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn); |
502 | void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn); | 512 | void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn); |
513 | int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn); | ||
514 | void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn); | ||
503 | 515 | ||
504 | int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar); | 516 | int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar); |
505 | void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar); | 517 | void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar); |
@@ -539,8 +551,8 @@ void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt); | |||
539 | int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp); | 551 | int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp); |
540 | void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp); | 552 | void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp); |
541 | 553 | ||
542 | int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, struct mlx4_mtt *mtt, | 554 | int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcdn, |
543 | u64 db_rec, struct mlx4_srq *srq); | 555 | struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq); |
544 | void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq); | 556 | void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq); |
545 | int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark); | 557 | int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark); |
546 | int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark); | 558 | int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark); |
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h index 4001c8249dbb..48cc4cb97858 100644 --- a/include/linux/mlx4/qp.h +++ b/include/linux/mlx4/qp.h | |||
@@ -75,6 +75,7 @@ enum { | |||
75 | MLX4_QP_ST_UC = 0x1, | 75 | MLX4_QP_ST_UC = 0x1, |
76 | MLX4_QP_ST_RD = 0x2, | 76 | MLX4_QP_ST_RD = 0x2, |
77 | MLX4_QP_ST_UD = 0x3, | 77 | MLX4_QP_ST_UD = 0x3, |
78 | MLX4_QP_ST_XRC = 0x6, | ||
78 | MLX4_QP_ST_MLX = 0x7 | 79 | MLX4_QP_ST_MLX = 0x7 |
79 | }; | 80 | }; |
80 | 81 | ||
@@ -137,7 +138,7 @@ struct mlx4_qp_context { | |||
137 | __be32 ssn; | 138 | __be32 ssn; |
138 | __be32 params2; | 139 | __be32 params2; |
139 | __be32 rnr_nextrecvpsn; | 140 | __be32 rnr_nextrecvpsn; |
140 | __be32 srcd; | 141 | __be32 xrcd; |
141 | __be32 cqn_recv; | 142 | __be32 cqn_recv; |
142 | __be64 db_rec_addr; | 143 | __be64 db_rec_addr; |
143 | __be32 qkey; | 144 | __be32 qkey; |