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authorVladimir Sokolovsky <vlad@mellanox.co.il>2010-04-14 10:23:39 -0400
committerRoland Dreier <rolandd@cisco.com>2010-04-21 19:37:49 -0400
commit6fa8f719844b8455033e295f720e739c1dc3804a (patch)
treef3080e38beb16b836ec5eb3ba6cb99dfc07316a0 /include/linux/mlx4
parent5e80ba8ff0bd33ff4af2365969a231cbdb98cafb (diff)
IB/mlx4: Add support for masked atomic operations
Add support for masked atomic operations (masked compare and swap, masked fetch and add). Signed-off-by: Vladimir Sokolovsky <vlad@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'include/linux/mlx4')
-rw-r--r--include/linux/mlx4/device.h4
-rw-r--r--include/linux/mlx4/qp.h7
2 files changed, 9 insertions, 2 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index e92d1bfdb330..7a7f9c1e679a 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -123,8 +123,8 @@ enum {
123 MLX4_OPCODE_RDMA_READ = 0x10, 123 MLX4_OPCODE_RDMA_READ = 0x10,
124 MLX4_OPCODE_ATOMIC_CS = 0x11, 124 MLX4_OPCODE_ATOMIC_CS = 0x11,
125 MLX4_OPCODE_ATOMIC_FA = 0x12, 125 MLX4_OPCODE_ATOMIC_FA = 0x12,
126 MLX4_OPCODE_ATOMIC_MASK_CS = 0x14, 126 MLX4_OPCODE_MASKED_ATOMIC_CS = 0x14,
127 MLX4_OPCODE_ATOMIC_MASK_FA = 0x15, 127 MLX4_OPCODE_MASKED_ATOMIC_FA = 0x15,
128 MLX4_OPCODE_BIND_MW = 0x18, 128 MLX4_OPCODE_BIND_MW = 0x18,
129 MLX4_OPCODE_FMR = 0x19, 129 MLX4_OPCODE_FMR = 0x19,
130 MLX4_OPCODE_LOCAL_INVAL = 0x1b, 130 MLX4_OPCODE_LOCAL_INVAL = 0x1b,
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h
index 9f29d86e5dc9..7abe64326f72 100644
--- a/include/linux/mlx4/qp.h
+++ b/include/linux/mlx4/qp.h
@@ -285,6 +285,13 @@ struct mlx4_wqe_atomic_seg {
285 __be64 compare; 285 __be64 compare;
286}; 286};
287 287
288struct mlx4_wqe_masked_atomic_seg {
289 __be64 swap_add;
290 __be64 compare;
291 __be64 swap_add_mask;
292 __be64 compare_mask;
293};
294
288struct mlx4_wqe_data_seg { 295struct mlx4_wqe_data_seg {
289 __be32 byte_count; 296 __be32 byte_count;
290 __be32 lkey; 297 __be32 lkey;