diff options
author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:55:21 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:55:21 -0400 |
commit | bbb20089a3275a19e475dbc21320c3742e3ca423 (patch) | |
tree | 216fdc1cbef450ca688135c5b8969169482d9a48 /include/linux/mii.h | |
parent | 3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff) | |
parent | 657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff) |
Merge branch 'dmaengine' into async-tx-next
Conflicts:
crypto/async_tx/async_xor.c
drivers/dma/ioat/dma_v2.h
drivers/dma/ioat/pci.c
drivers/md/raid5.c
Diffstat (limited to 'include/linux/mii.h')
-rw-r--r-- | include/linux/mii.h | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/include/linux/mii.h b/include/linux/mii.h index ad748588faf1..359fba880274 100644 --- a/include/linux/mii.h +++ b/include/linux/mii.h | |||
@@ -240,6 +240,22 @@ static inline unsigned int mii_duplex (unsigned int duplex_lock, | |||
240 | } | 240 | } |
241 | 241 | ||
242 | /** | 242 | /** |
243 | * mii_advertise_flowctrl - get flow control advertisement flags | ||
244 | * @cap: Flow control capabilities (FLOW_CTRL_RX, FLOW_CTRL_TX or both) | ||
245 | */ | ||
246 | static inline u16 mii_advertise_flowctrl(int cap) | ||
247 | { | ||
248 | u16 adv = 0; | ||
249 | |||
250 | if (cap & FLOW_CTRL_RX) | ||
251 | adv = ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; | ||
252 | if (cap & FLOW_CTRL_TX) | ||
253 | adv ^= ADVERTISE_PAUSE_ASYM; | ||
254 | |||
255 | return adv; | ||
256 | } | ||
257 | |||
258 | /** | ||
243 | * mii_resolve_flowctrl_fdx | 259 | * mii_resolve_flowctrl_fdx |
244 | * @lcladv: value of MII ADVERTISE register | 260 | * @lcladv: value of MII ADVERTISE register |
245 | * @rmtadv: value of MII LPA register | 261 | * @rmtadv: value of MII LPA register |
@@ -250,18 +266,12 @@ static inline u8 mii_resolve_flowctrl_fdx(u16 lcladv, u16 rmtadv) | |||
250 | { | 266 | { |
251 | u8 cap = 0; | 267 | u8 cap = 0; |
252 | 268 | ||
253 | if (lcladv & ADVERTISE_PAUSE_CAP) { | 269 | if (lcladv & rmtadv & ADVERTISE_PAUSE_CAP) { |
254 | if (lcladv & ADVERTISE_PAUSE_ASYM) { | 270 | cap = FLOW_CTRL_TX | FLOW_CTRL_RX; |
255 | if (rmtadv & LPA_PAUSE_CAP) | 271 | } else if (lcladv & rmtadv & ADVERTISE_PAUSE_ASYM) { |
256 | cap = FLOW_CTRL_TX | FLOW_CTRL_RX; | 272 | if (lcladv & ADVERTISE_PAUSE_CAP) |
257 | else if (rmtadv & LPA_PAUSE_ASYM) | 273 | cap = FLOW_CTRL_RX; |
258 | cap = FLOW_CTRL_RX; | 274 | else if (rmtadv & ADVERTISE_PAUSE_CAP) |
259 | } else { | ||
260 | if (rmtadv & LPA_PAUSE_CAP) | ||
261 | cap = FLOW_CTRL_TX | FLOW_CTRL_RX; | ||
262 | } | ||
263 | } else if (lcladv & ADVERTISE_PAUSE_ASYM) { | ||
264 | if ((rmtadv & LPA_PAUSE_CAP) && (rmtadv & LPA_PAUSE_ASYM)) | ||
265 | cap = FLOW_CTRL_TX; | 275 | cap = FLOW_CTRL_TX; |
266 | } | 276 | } |
267 | 277 | ||