diff options
author | Mark Einon <mark.einon@gmail.com> | 2011-08-31 19:22:16 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-09-15 15:36:34 -0400 |
commit | c44f7eb4c127be8bb8b160902845b88d489492e5 (patch) | |
tree | fd1c599ebd377db3826ecaf48dacaaf64448500d /include/linux/mii.h | |
parent | c37e0c993055d8c4fd82202331d06e6ef9bfec4b (diff) |
mii: Convert spaces to tabs in mii.h
Whitespace changes - spaces converted to tabs after each define name and value
Signed-off-by: Mark Einon <mark.einon@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/mii.h')
-rw-r--r-- | include/linux/mii.h | 210 |
1 files changed, 104 insertions, 106 deletions
diff --git a/include/linux/mii.h b/include/linux/mii.h index 103113a2fd18..d9f77505d009 100644 --- a/include/linux/mii.h +++ b/include/linux/mii.h | |||
@@ -11,131 +11,130 @@ | |||
11 | #include <linux/types.h> | 11 | #include <linux/types.h> |
12 | 12 | ||
13 | /* Generic MII registers. */ | 13 | /* Generic MII registers. */ |
14 | 14 | #define MII_BMCR 0x00 /* Basic mode control register */ | |
15 | #define MII_BMCR 0x00 /* Basic mode control register */ | 15 | #define MII_BMSR 0x01 /* Basic mode status register */ |
16 | #define MII_BMSR 0x01 /* Basic mode status register */ | 16 | #define MII_PHYSID1 0x02 /* PHYS ID 1 */ |
17 | #define MII_PHYSID1 0x02 /* PHYS ID 1 */ | 17 | #define MII_PHYSID2 0x03 /* PHYS ID 2 */ |
18 | #define MII_PHYSID2 0x03 /* PHYS ID 2 */ | 18 | #define MII_ADVERTISE 0x04 /* Advertisement control reg */ |
19 | #define MII_ADVERTISE 0x04 /* Advertisement control reg */ | 19 | #define MII_LPA 0x05 /* Link partner ability reg */ |
20 | #define MII_LPA 0x05 /* Link partner ability reg */ | 20 | #define MII_EXPANSION 0x06 /* Expansion register */ |
21 | #define MII_EXPANSION 0x06 /* Expansion register */ | 21 | #define MII_CTRL1000 0x09 /* 1000BASE-T control */ |
22 | #define MII_CTRL1000 0x09 /* 1000BASE-T control */ | 22 | #define MII_STAT1000 0x0a /* 1000BASE-T status */ |
23 | #define MII_STAT1000 0x0a /* 1000BASE-T status */ | 23 | #define MII_ESTATUS 0x0f /* Extended Status */ |
24 | #define MII_ESTATUS 0x0f /* Extended Status */ | 24 | #define MII_DCOUNTER 0x12 /* Disconnect counter */ |
25 | #define MII_DCOUNTER 0x12 /* Disconnect counter */ | 25 | #define MII_FCSCOUNTER 0x13 /* False carrier counter */ |
26 | #define MII_FCSCOUNTER 0x13 /* False carrier counter */ | 26 | #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ |
27 | #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ | 27 | #define MII_RERRCOUNTER 0x15 /* Receive error counter */ |
28 | #define MII_RERRCOUNTER 0x15 /* Receive error counter */ | 28 | #define MII_SREVISION 0x16 /* Silicon revision */ |
29 | #define MII_SREVISION 0x16 /* Silicon revision */ | 29 | #define MII_RESV1 0x17 /* Reserved... */ |
30 | #define MII_RESV1 0x17 /* Reserved... */ | 30 | #define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ |
31 | #define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ | 31 | #define MII_PHYADDR 0x19 /* PHY address */ |
32 | #define MII_PHYADDR 0x19 /* PHY address */ | 32 | #define MII_RESV2 0x1a /* Reserved... */ |
33 | #define MII_RESV2 0x1a /* Reserved... */ | 33 | #define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ |
34 | #define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ | 34 | #define MII_NCONFIG 0x1c /* Network interface config */ |
35 | #define MII_NCONFIG 0x1c /* Network interface config */ | ||
36 | 35 | ||
37 | /* Basic mode control register. */ | 36 | /* Basic mode control register. */ |
38 | #define BMCR_RESV 0x003f /* Unused... */ | 37 | #define BMCR_RESV 0x003f /* Unused... */ |
39 | #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ | 38 | #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ |
40 | #define BMCR_CTST 0x0080 /* Collision test */ | 39 | #define BMCR_CTST 0x0080 /* Collision test */ |
41 | #define BMCR_FULLDPLX 0x0100 /* Full duplex */ | 40 | #define BMCR_FULLDPLX 0x0100 /* Full duplex */ |
42 | #define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ | 41 | #define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ |
43 | #define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ | 42 | #define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ |
44 | #define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ | 43 | #define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ |
45 | #define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ | 44 | #define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ |
46 | #define BMCR_SPEED100 0x2000 /* Select 100Mbps */ | 45 | #define BMCR_SPEED100 0x2000 /* Select 100Mbps */ |
47 | #define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ | 46 | #define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ |
48 | #define BMCR_RESET 0x8000 /* Reset the DP83840 */ | 47 | #define BMCR_RESET 0x8000 /* Reset the DP83840 */ |
49 | 48 | ||
50 | /* Basic mode status register. */ | 49 | /* Basic mode status register. */ |
51 | #define BMSR_ERCAP 0x0001 /* Ext-reg capability */ | 50 | #define BMSR_ERCAP 0x0001 /* Ext-reg capability */ |
52 | #define BMSR_JCD 0x0002 /* Jabber detected */ | 51 | #define BMSR_JCD 0x0002 /* Jabber detected */ |
53 | #define BMSR_LSTATUS 0x0004 /* Link status */ | 52 | #define BMSR_LSTATUS 0x0004 /* Link status */ |
54 | #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ | 53 | #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ |
55 | #define BMSR_RFAULT 0x0010 /* Remote fault detected */ | 54 | #define BMSR_RFAULT 0x0010 /* Remote fault detected */ |
56 | #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ | 55 | #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ |
57 | #define BMSR_RESV 0x00c0 /* Unused... */ | 56 | #define BMSR_RESV 0x00c0 /* Unused... */ |
58 | #define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ | 57 | #define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ |
59 | #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ | 58 | #define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */ |
60 | #define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ | 59 | #define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */ |
61 | #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ | 60 | #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ |
62 | #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ | 61 | #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ |
63 | #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ | 62 | #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ |
64 | #define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ | 63 | #define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ |
65 | #define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ | 64 | #define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ |
66 | 65 | ||
67 | /* Advertisement control register. */ | 66 | /* Advertisement control register. */ |
68 | #define ADVERTISE_SLCT 0x001f /* Selector bits */ | 67 | #define ADVERTISE_SLCT 0x001f /* Selector bits */ |
69 | #define ADVERTISE_CSMA 0x0001 /* Only selector supported */ | 68 | #define ADVERTISE_CSMA 0x0001 /* Only selector supported */ |
70 | #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ | 69 | #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ |
71 | #define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ | 70 | #define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ |
72 | #define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ | 71 | #define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ |
73 | #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ | 72 | #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ |
74 | #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ | 73 | #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ |
75 | #define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ | 74 | #define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ |
76 | #define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ | 75 | #define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ |
77 | #define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ | 76 | #define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ |
78 | #define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ | 77 | #define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ |
79 | #define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ | 78 | #define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ |
80 | #define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ | 79 | #define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ |
81 | #define ADVERTISE_RESV 0x1000 /* Unused... */ | 80 | #define ADVERTISE_RESV 0x1000 /* Unused... */ |
82 | #define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ | 81 | #define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ |
83 | #define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ | 82 | #define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ |
84 | #define ADVERTISE_NPAGE 0x8000 /* Next page bit */ | 83 | #define ADVERTISE_NPAGE 0x8000 /* Next page bit */ |
85 | 84 | ||
86 | #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ | 85 | #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ |
87 | ADVERTISE_CSMA) | 86 | ADVERTISE_CSMA) |
88 | #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ | 87 | #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ |
89 | ADVERTISE_100HALF | ADVERTISE_100FULL) | 88 | ADVERTISE_100HALF | ADVERTISE_100FULL) |
90 | 89 | ||
91 | /* Link partner ability register. */ | 90 | /* Link partner ability register. */ |
92 | #define LPA_SLCT 0x001f /* Same as advertise selector */ | 91 | #define LPA_SLCT 0x001f /* Same as advertise selector */ |
93 | #define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ | 92 | #define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ |
94 | #define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ | 93 | #define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ |
95 | #define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ | 94 | #define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ |
96 | #define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ | 95 | #define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ |
97 | #define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ | 96 | #define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ |
98 | #define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ | 97 | #define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ |
99 | #define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ | 98 | #define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ |
100 | #define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ | 99 | #define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ |
101 | #define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ | 100 | #define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ |
102 | #define LPA_PAUSE_CAP 0x0400 /* Can pause */ | 101 | #define LPA_PAUSE_CAP 0x0400 /* Can pause */ |
103 | #define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ | 102 | #define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ |
104 | #define LPA_RESV 0x1000 /* Unused... */ | 103 | #define LPA_RESV 0x1000 /* Unused... */ |
105 | #define LPA_RFAULT 0x2000 /* Link partner faulted */ | 104 | #define LPA_RFAULT 0x2000 /* Link partner faulted */ |
106 | #define LPA_LPACK 0x4000 /* Link partner acked us */ | 105 | #define LPA_LPACK 0x4000 /* Link partner acked us */ |
107 | #define LPA_NPAGE 0x8000 /* Next page bit */ | 106 | #define LPA_NPAGE 0x8000 /* Next page bit */ |
108 | 107 | ||
109 | #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) | 108 | #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) |
110 | #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) | 109 | #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) |
111 | 110 | ||
112 | /* Expansion register for auto-negotiation. */ | 111 | /* Expansion register for auto-negotiation. */ |
113 | #define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ | 112 | #define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ |
114 | #define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ | 113 | #define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ |
115 | #define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ | 114 | #define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ |
116 | #define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ | 115 | #define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ |
117 | #define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ | 116 | #define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ |
118 | #define EXPANSION_RESV 0xffe0 /* Unused... */ | 117 | #define EXPANSION_RESV 0xffe0 /* Unused... */ |
119 | 118 | ||
120 | #define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ | 119 | #define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ |
121 | #define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ | 120 | #define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ |
122 | 121 | ||
123 | /* N-way test register. */ | 122 | /* N-way test register. */ |
124 | #define NWAYTEST_RESV1 0x00ff /* Unused... */ | 123 | #define NWAYTEST_RESV1 0x00ff /* Unused... */ |
125 | #define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ | 124 | #define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ |
126 | #define NWAYTEST_RESV2 0xfe00 /* Unused... */ | 125 | #define NWAYTEST_RESV2 0xfe00 /* Unused... */ |
127 | 126 | ||
128 | /* 1000BASE-T Control register */ | 127 | /* 1000BASE-T Control register */ |
129 | #define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ | 128 | #define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ |
130 | #define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ | 129 | #define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ |
131 | #define CTL1000_AS_MASTER 0x0800 | 130 | #define CTL1000_AS_MASTER 0x0800 |
132 | #define CTL1000_ENABLE_MASTER 0x1000 | 131 | #define CTL1000_ENABLE_MASTER 0x1000 |
133 | 132 | ||
134 | /* 1000BASE-T Status register */ | 133 | /* 1000BASE-T Status register */ |
135 | #define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ | 134 | #define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ |
136 | #define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ | 135 | #define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ |
137 | #define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ | 136 | #define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ |
138 | #define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ | 137 | #define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */ |
139 | 138 | ||
140 | /* Flow control flags */ | 139 | /* Flow control flags */ |
141 | #define FLOW_CTRL_TX 0x01 | 140 | #define FLOW_CTRL_TX 0x01 |
@@ -149,7 +148,7 @@ struct mii_ioctl_data { | |||
149 | __u16 val_out; | 148 | __u16 val_out; |
150 | }; | 149 | }; |
151 | 150 | ||
152 | #ifdef __KERNEL__ | 151 | #ifdef __KERNEL__ |
153 | 152 | ||
154 | #include <linux/if.h> | 153 | #include <linux/if.h> |
155 | 154 | ||
@@ -180,7 +179,7 @@ extern unsigned int mii_check_media (struct mii_if_info *mii, | |||
180 | unsigned int ok_to_print, | 179 | unsigned int ok_to_print, |
181 | unsigned int init_media); | 180 | unsigned int init_media); |
182 | extern int generic_mii_ioctl(struct mii_if_info *mii_if, | 181 | extern int generic_mii_ioctl(struct mii_if_info *mii_if, |
183 | struct mii_ioctl_data *mii_data, int cmd, | 182 | struct mii_ioctl_data *mii_data, int cmd, |
184 | unsigned int *duplex_changed); | 183 | unsigned int *duplex_changed); |
185 | 184 | ||
186 | 185 | ||
@@ -189,7 +188,6 @@ static inline struct mii_ioctl_data *if_mii(struct ifreq *rq) | |||
189 | return (struct mii_ioctl_data *) &rq->ifr_ifru; | 188 | return (struct mii_ioctl_data *) &rq->ifr_ifru; |
190 | } | 189 | } |
191 | 190 | ||
192 | |||
193 | /** | 191 | /** |
194 | * mii_nway_result | 192 | * mii_nway_result |
195 | * @negotiated: value of MII ANAR and'd with ANLPAR | 193 | * @negotiated: value of MII ANAR and'd with ANLPAR |