diff options
author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-08-02 09:48:04 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2010-08-12 05:28:04 -0400 |
commit | b6e6d54cab7633dd2216ede77ccd00cdaebd77ad (patch) | |
tree | 8997e19d67a0d081bb7f34a2f0f89663998507b8 /include/linux/mfd | |
parent | eaf06ee22594ac90cdd0279483b06c1db1667e01 (diff) |
mfd: Get rid of now unused mc13783 private header
This adds all remaining definitions that are used by the core driver
to the .c file.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'include/linux/mfd')
-rw-r--r-- | include/linux/mfd/mc13783-private.h | 220 |
1 files changed, 0 insertions, 220 deletions
diff --git a/include/linux/mfd/mc13783-private.h b/include/linux/mfd/mc13783-private.h deleted file mode 100644 index 95cf9360553f..000000000000 --- a/include/linux/mfd/mc13783-private.h +++ /dev/null | |||
@@ -1,220 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> | ||
3 | * | ||
4 | * Initial development of this code was funded by | ||
5 | * Phytec Messtechnik GmbH, http://www.phytec.de | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
20 | */ | ||
21 | |||
22 | #ifndef __LINUX_MFD_MC13783_PRIV_H | ||
23 | #define __LINUX_MFD_MC13783_PRIV_H | ||
24 | |||
25 | #include <linux/platform_device.h> | ||
26 | #include <linux/mfd/mc13783.h> | ||
27 | #include <linux/mutex.h> | ||
28 | #include <linux/interrupt.h> | ||
29 | |||
30 | struct mc13783 { | ||
31 | struct spi_device *spidev; | ||
32 | struct mutex lock; | ||
33 | int irq; | ||
34 | int flags; | ||
35 | |||
36 | irq_handler_t irqhandler[MC13783_NUM_IRQ]; | ||
37 | void *irqdata[MC13783_NUM_IRQ]; | ||
38 | |||
39 | /* XXX these should go as platformdata to the regulator subdevice */ | ||
40 | struct mc13783_regulator_init_data *regulators; | ||
41 | int num_regulators; | ||
42 | }; | ||
43 | |||
44 | #define MC13783_REG_INTERRUPT_STATUS_0 0 | ||
45 | #define MC13783_REG_INTERRUPT_MASK_0 1 | ||
46 | #define MC13783_REG_INTERRUPT_SENSE_0 2 | ||
47 | #define MC13783_REG_INTERRUPT_STATUS_1 3 | ||
48 | #define MC13783_REG_INTERRUPT_MASK_1 4 | ||
49 | #define MC13783_REG_INTERRUPT_SENSE_1 5 | ||
50 | #define MC13783_REG_POWER_UP_MODE_SENSE 6 | ||
51 | #define MC13783_REG_REVISION 7 | ||
52 | #define MC13783_REG_SEMAPHORE 8 | ||
53 | #define MC13783_REG_ARBITRATION_PERIPHERAL_AUDIO 9 | ||
54 | #define MC13783_REG_ARBITRATION_SWITCHERS 10 | ||
55 | #define MC13783_REG_ARBITRATION_REGULATORS_0 11 | ||
56 | #define MC13783_REG_ARBITRATION_REGULATORS_1 12 | ||
57 | #define MC13783_REG_POWER_CONTROL_0 13 | ||
58 | #define MC13783_REG_POWER_CONTROL_1 14 | ||
59 | #define MC13783_REG_POWER_CONTROL_2 15 | ||
60 | #define MC13783_REG_REGEN_ASSIGNMENT 16 | ||
61 | #define MC13783_REG_CONTROL_SPARE 17 | ||
62 | #define MC13783_REG_MEMORY_A 18 | ||
63 | #define MC13783_REG_MEMORY_B 19 | ||
64 | #define MC13783_REG_RTC_TIME 20 | ||
65 | #define MC13783_REG_RTC_ALARM 21 | ||
66 | #define MC13783_REG_RTC_DAY 22 | ||
67 | #define MC13783_REG_RTC_DAY_ALARM 23 | ||
68 | #define MC13783_REG_SWITCHERS_0 24 | ||
69 | #define MC13783_REG_SWITCHERS_1 25 | ||
70 | #define MC13783_REG_SWITCHERS_2 26 | ||
71 | #define MC13783_REG_SWITCHERS_3 27 | ||
72 | #define MC13783_REG_SWITCHERS_4 28 | ||
73 | #define MC13783_REG_SWITCHERS_5 29 | ||
74 | #define MC13783_REG_REGULATOR_SETTING_0 30 | ||
75 | #define MC13783_REG_REGULATOR_SETTING_1 31 | ||
76 | #define MC13783_REG_REGULATOR_MODE_0 32 | ||
77 | #define MC13783_REG_REGULATOR_MODE_1 33 | ||
78 | #define MC13783_REG_POWER_MISCELLANEOUS 34 | ||
79 | #define MC13783_REG_POWER_SPARE 35 | ||
80 | #define MC13783_REG_AUDIO_RX_0 36 | ||
81 | #define MC13783_REG_AUDIO_RX_1 37 | ||
82 | #define MC13783_REG_AUDIO_TX 38 | ||
83 | #define MC13783_REG_AUDIO_SSI_NETWORK 39 | ||
84 | #define MC13783_REG_AUDIO_CODEC 40 | ||
85 | #define MC13783_REG_AUDIO_STEREO_DAC 41 | ||
86 | #define MC13783_REG_AUDIO_SPARE 42 | ||
87 | #define MC13783_REG_ADC_0 43 | ||
88 | #define MC13783_REG_ADC_1 44 | ||
89 | #define MC13783_REG_ADC_2 45 | ||
90 | #define MC13783_REG_ADC_3 46 | ||
91 | #define MC13783_REG_ADC_4 47 | ||
92 | #define MC13783_REG_CHARGER 48 | ||
93 | #define MC13783_REG_USB 49 | ||
94 | #define MC13783_REG_CHARGE_USB_SPARE 50 | ||
95 | #define MC13783_REG_LED_CONTROL_0 51 | ||
96 | #define MC13783_REG_LED_CONTROL_1 52 | ||
97 | #define MC13783_REG_LED_CONTROL_2 53 | ||
98 | #define MC13783_REG_LED_CONTROL_3 54 | ||
99 | #define MC13783_REG_LED_CONTROL_4 55 | ||
100 | #define MC13783_REG_LED_CONTROL_5 56 | ||
101 | #define MC13783_REG_SPARE 57 | ||
102 | #define MC13783_REG_TRIM_0 58 | ||
103 | #define MC13783_REG_TRIM_1 59 | ||
104 | #define MC13783_REG_TEST_0 60 | ||
105 | #define MC13783_REG_TEST_1 61 | ||
106 | #define MC13783_REG_TEST_2 62 | ||
107 | #define MC13783_REG_TEST_3 63 | ||
108 | #define MC13783_REG_NB 64 | ||
109 | |||
110 | /* | ||
111 | * Reg Regulator Mode 0 | ||
112 | */ | ||
113 | #define MC13783_REGCTRL_VAUDIO_EN (1 << 0) | ||
114 | #define MC13783_REGCTRL_VAUDIO_STBY (1 << 1) | ||
115 | #define MC13783_REGCTRL_VAUDIO_MODE (1 << 2) | ||
116 | #define MC13783_REGCTRL_VIOHI_EN (1 << 3) | ||
117 | #define MC13783_REGCTRL_VIOHI_STBY (1 << 4) | ||
118 | #define MC13783_REGCTRL_VIOHI_MODE (1 << 5) | ||
119 | #define MC13783_REGCTRL_VIOLO_EN (1 << 6) | ||
120 | #define MC13783_REGCTRL_VIOLO_STBY (1 << 7) | ||
121 | #define MC13783_REGCTRL_VIOLO_MODE (1 << 8) | ||
122 | #define MC13783_REGCTRL_VDIG_EN (1 << 9) | ||
123 | #define MC13783_REGCTRL_VDIG_STBY (1 << 10) | ||
124 | #define MC13783_REGCTRL_VDIG_MODE (1 << 11) | ||
125 | #define MC13783_REGCTRL_VGEN_EN (1 << 12) | ||
126 | #define MC13783_REGCTRL_VGEN_STBY (1 << 13) | ||
127 | #define MC13783_REGCTRL_VGEN_MODE (1 << 14) | ||
128 | #define MC13783_REGCTRL_VRFDIG_EN (1 << 15) | ||
129 | #define MC13783_REGCTRL_VRFDIG_STBY (1 << 16) | ||
130 | #define MC13783_REGCTRL_VRFDIG_MODE (1 << 17) | ||
131 | #define MC13783_REGCTRL_VRFREF_EN (1 << 18) | ||
132 | #define MC13783_REGCTRL_VRFREF_STBY (1 << 19) | ||
133 | #define MC13783_REGCTRL_VRFREF_MODE (1 << 20) | ||
134 | #define MC13783_REGCTRL_VRFCP_EN (1 << 21) | ||
135 | #define MC13783_REGCTRL_VRFCP_STBY (1 << 22) | ||
136 | #define MC13783_REGCTRL_VRFCP_MODE (1 << 23) | ||
137 | |||
138 | /* | ||
139 | * Reg Regulator Mode 1 | ||
140 | */ | ||
141 | #define MC13783_REGCTRL_VSIM_EN (1 << 0) | ||
142 | #define MC13783_REGCTRL_VSIM_STBY (1 << 1) | ||
143 | #define MC13783_REGCTRL_VSIM_MODE (1 << 2) | ||
144 | #define MC13783_REGCTRL_VESIM_EN (1 << 3) | ||
145 | #define MC13783_REGCTRL_VESIM_STBY (1 << 4) | ||
146 | #define MC13783_REGCTRL_VESIM_MODE (1 << 5) | ||
147 | #define MC13783_REGCTRL_VCAM_EN (1 << 6) | ||
148 | #define MC13783_REGCTRL_VCAM_STBY (1 << 7) | ||
149 | #define MC13783_REGCTRL_VCAM_MODE (1 << 8) | ||
150 | #define MC13783_REGCTRL_VRFBG_EN (1 << 9) | ||
151 | #define MC13783_REGCTRL_VRFBG_STBY (1 << 10) | ||
152 | #define MC13783_REGCTRL_VVIB_EN (1 << 11) | ||
153 | #define MC13783_REGCTRL_VRF1_EN (1 << 12) | ||
154 | #define MC13783_REGCTRL_VRF1_STBY (1 << 13) | ||
155 | #define MC13783_REGCTRL_VRF1_MODE (1 << 14) | ||
156 | #define MC13783_REGCTRL_VRF2_EN (1 << 15) | ||
157 | #define MC13783_REGCTRL_VRF2_STBY (1 << 16) | ||
158 | #define MC13783_REGCTRL_VRF2_MODE (1 << 17) | ||
159 | #define MC13783_REGCTRL_VMMC1_EN (1 << 18) | ||
160 | #define MC13783_REGCTRL_VMMC1_STBY (1 << 19) | ||
161 | #define MC13783_REGCTRL_VMMC1_MODE (1 << 20) | ||
162 | #define MC13783_REGCTRL_VMMC2_EN (1 << 21) | ||
163 | #define MC13783_REGCTRL_VMMC2_STBY (1 << 22) | ||
164 | #define MC13783_REGCTRL_VMMC2_MODE (1 << 23) | ||
165 | |||
166 | /* | ||
167 | * Reg Regulator Misc. | ||
168 | */ | ||
169 | #define MC13783_REGCTRL_GPO1_EN (1 << 6) | ||
170 | #define MC13783_REGCTRL_GPO2_EN (1 << 8) | ||
171 | #define MC13783_REGCTRL_GPO3_EN (1 << 10) | ||
172 | #define MC13783_REGCTRL_GPO4_EN (1 << 12) | ||
173 | #define MC13783_REGCTRL_VIBPINCTRL (1 << 14) | ||
174 | |||
175 | /* | ||
176 | * Reg Switcher 4 | ||
177 | */ | ||
178 | #define MC13783_SWCTRL_SW1A_MODE (1 << 0) | ||
179 | #define MC13783_SWCTRL_SW1A_STBY_MODE (1 << 2) | ||
180 | #define MC13783_SWCTRL_SW1A_DVS_SPEED (1 << 6) | ||
181 | #define MC13783_SWCTRL_SW1A_PANIC_MODE (1 << 8) | ||
182 | #define MC13783_SWCTRL_SW1A_SOFTSTART (1 << 9) | ||
183 | #define MC13783_SWCTRL_SW1B_MODE (1 << 10) | ||
184 | #define MC13783_SWCTRL_SW1B_STBY_MODE (1 << 12) | ||
185 | #define MC13783_SWCTRL_SW1B_DVS_SPEED (1 << 14) | ||
186 | #define MC13783_SWCTRL_SW1B_PANIC_MODE (1 << 16) | ||
187 | #define MC13783_SWCTRL_SW1B_SOFTSTART (1 << 17) | ||
188 | #define MC13783_SWCTRL_PLL_EN (1 << 18) | ||
189 | #define MC13783_SWCTRL_PLL_FACTOR (1 << 19) | ||
190 | |||
191 | /* | ||
192 | * Reg Switcher 5 | ||
193 | */ | ||
194 | #define MC13783_SWCTRL_SW2A_MODE (1 << 0) | ||
195 | #define MC13783_SWCTRL_SW2A_STBY_MODE (1 << 2) | ||
196 | #define MC13783_SWCTRL_SW2A_DVS_SPEED (1 << 6) | ||
197 | #define MC13783_SWCTRL_SW2A_PANIC_MODE (1 << 8) | ||
198 | #define MC13783_SWCTRL_SW2A_SOFTSTART (1 << 9) | ||
199 | #define MC13783_SWCTRL_SW2B_MODE (1 << 10) | ||
200 | #define MC13783_SWCTRL_SW2B_STBY_MODE (1 << 12) | ||
201 | #define MC13783_SWCTRL_SW2B_DVS_SPEED (1 << 14) | ||
202 | #define MC13783_SWCTRL_SW2B_PANIC_MODE (1 << 16) | ||
203 | #define MC13783_SWCTRL_SW2B_SOFTSTART (1 << 17) | ||
204 | #define MC13783_SWSET_SW3 (1 << 18) | ||
205 | #define MC13783_SWCTRL_SW3_EN (1 << 20) | ||
206 | #define MC13783_SWCTRL_SW3_STBY (1 << 21) | ||
207 | #define MC13783_SWCTRL_SW3_MODE (1 << 22) | ||
208 | |||
209 | static inline int mc13783_set_bits(struct mc13783 *mc13783, unsigned int offset, | ||
210 | u32 mask, u32 val) | ||
211 | { | ||
212 | int ret; | ||
213 | mc13783_lock(mc13783); | ||
214 | ret = mc13783_reg_rmw(mc13783, offset, mask, val); | ||
215 | mc13783_unlock(mc13783); | ||
216 | |||
217 | return ret; | ||
218 | } | ||
219 | |||
220 | #endif /* __LINUX_MFD_MC13783_PRIV_H */ | ||