diff options
author | Krzysztof Kozlowski <k.kozlowski@samsung.com> | 2014-02-28 05:41:44 -0500 |
---|---|---|
committer | Lee Jones <lee.jones@linaro.org> | 2014-03-18 06:50:09 -0400 |
commit | dc6919663f7a02d02cc08d605a1f68d6cefe0042 (patch) | |
tree | f114b7cbbb668615d3aa747421da5da9bb5d00e8 /include/linux/mfd | |
parent | 677620952a0fd1b1618bed57c1ebd94bf3c710f3 (diff) |
mfd: sec: Add support for S2MPS14
Add support for S2MPS14 PMIC device to the MFD sec-core driver.
The S2MPS14 is similar to S2MPS11 but it has fewer regulators, two
clocks instead of three and a little different registers layout.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'include/linux/mfd')
-rw-r--r-- | include/linux/mfd/samsung/core.h | 1 | ||||
-rw-r--r-- | include/linux/mfd/samsung/irq.h | 27 | ||||
-rw-r--r-- | include/linux/mfd/samsung/rtc.h | 55 | ||||
-rw-r--r-- | include/linux/mfd/samsung/s2mps14.h | 152 |
4 files changed, 229 insertions, 6 deletions
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index 41c9bde410c5..8e9bbb1083d4 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h | |||
@@ -19,6 +19,7 @@ enum sec_device_type { | |||
19 | S5M8763X, | 19 | S5M8763X, |
20 | S5M8767X, | 20 | S5M8767X, |
21 | S2MPS11X, | 21 | S2MPS11X, |
22 | S2MPS14X, | ||
22 | }; | 23 | }; |
23 | 24 | ||
24 | /** | 25 | /** |
diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h index abe1a6aae3b7..0065f6f1daf4 100644 --- a/include/linux/mfd/samsung/irq.h +++ b/include/linux/mfd/samsung/irq.h | |||
@@ -55,6 +55,33 @@ enum s2mps11_irq { | |||
55 | #define S2MPS11_IRQ_INT120C_MASK (1 << 0) | 55 | #define S2MPS11_IRQ_INT120C_MASK (1 << 0) |
56 | #define S2MPS11_IRQ_INT140C_MASK (1 << 1) | 56 | #define S2MPS11_IRQ_INT140C_MASK (1 << 1) |
57 | 57 | ||
58 | enum s2mps14_irq { | ||
59 | S2MPS14_IRQ_PWRONF, | ||
60 | S2MPS14_IRQ_PWRONR, | ||
61 | S2MPS14_IRQ_JIGONBF, | ||
62 | S2MPS14_IRQ_JIGONBR, | ||
63 | S2MPS14_IRQ_ACOKBF, | ||
64 | S2MPS14_IRQ_ACOKBR, | ||
65 | S2MPS14_IRQ_PWRON1S, | ||
66 | S2MPS14_IRQ_MRB, | ||
67 | |||
68 | S2MPS14_IRQ_RTC60S, | ||
69 | S2MPS14_IRQ_RTCA1, | ||
70 | S2MPS14_IRQ_RTCA0, | ||
71 | S2MPS14_IRQ_SMPL, | ||
72 | S2MPS14_IRQ_RTC1S, | ||
73 | S2MPS14_IRQ_WTSR, | ||
74 | |||
75 | S2MPS14_IRQ_INT120C, | ||
76 | S2MPS14_IRQ_INT140C, | ||
77 | S2MPS14_IRQ_TSD, | ||
78 | |||
79 | S2MPS14_IRQ_NR, | ||
80 | }; | ||
81 | |||
82 | /* Masks for interrupts are the same as in s2mps11 */ | ||
83 | #define S2MPS14_IRQ_TSD_MASK (1 << 2) | ||
84 | |||
58 | enum s5m8767_irq { | 85 | enum s5m8767_irq { |
59 | S5M8767_IRQ_PWRR, | 86 | S5M8767_IRQ_PWRR, |
60 | S5M8767_IRQ_PWRF, | 87 | S5M8767_IRQ_PWRF, |
diff --git a/include/linux/mfd/samsung/rtc.h b/include/linux/mfd/samsung/rtc.h index 4627f59ebd84..3e02b768d537 100644 --- a/include/linux/mfd/samsung/rtc.h +++ b/include/linux/mfd/samsung/rtc.h | |||
@@ -1,12 +1,17 @@ | |||
1 | /* rtc.h | 1 | /* rtc.h |
2 | * | 2 | * |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd | 3 | * Copyright (c) 2011-2014 Samsung Electronics Co., Ltd |
4 | * http://www.samsung.com | 4 | * http://www.samsung.com |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the | 7 | * under the terms of the GNU General Public License as published by the |
8 | * Free Software Foundation; either version 2 of the License, or (at your | 8 | * Free Software Foundation; either version 2 of the License, or (at your |
9 | * option) any later version. | 9 | * option) any later version. |
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
10 | * | 15 | * |
11 | */ | 16 | */ |
12 | 17 | ||
@@ -47,6 +52,37 @@ enum sec_rtc_reg { | |||
47 | SEC_RTC_REG_MAX, | 52 | SEC_RTC_REG_MAX, |
48 | }; | 53 | }; |
49 | 54 | ||
55 | enum s2mps_rtc_reg { | ||
56 | S2MPS_RTC_CTRL, | ||
57 | S2MPS_WTSR_SMPL_CNTL, | ||
58 | S2MPS_RTC_UDR_CON, | ||
59 | S2MPS_RSVD, | ||
60 | S2MPS_RTC_SEC, | ||
61 | S2MPS_RTC_MIN, | ||
62 | S2MPS_RTC_HOUR, | ||
63 | S2MPS_RTC_WEEKDAY, | ||
64 | S2MPS_RTC_DATE, | ||
65 | S2MPS_RTC_MONTH, | ||
66 | S2MPS_RTC_YEAR, | ||
67 | S2MPS_ALARM0_SEC, | ||
68 | S2MPS_ALARM0_MIN, | ||
69 | S2MPS_ALARM0_HOUR, | ||
70 | S2MPS_ALARM0_WEEKDAY, | ||
71 | S2MPS_ALARM0_DATE, | ||
72 | S2MPS_ALARM0_MONTH, | ||
73 | S2MPS_ALARM0_YEAR, | ||
74 | S2MPS_ALARM1_SEC, | ||
75 | S2MPS_ALARM1_MIN, | ||
76 | S2MPS_ALARM1_HOUR, | ||
77 | S2MPS_ALARM1_WEEKDAY, | ||
78 | S2MPS_ALARM1_DATE, | ||
79 | S2MPS_ALARM1_MONTH, | ||
80 | S2MPS_ALARM1_YEAR, | ||
81 | S2MPS_OFFSRC, | ||
82 | |||
83 | S2MPS_RTC_REG_MAX, | ||
84 | }; | ||
85 | |||
50 | #define RTC_I2C_ADDR (0x0C >> 1) | 86 | #define RTC_I2C_ADDR (0x0C >> 1) |
51 | 87 | ||
52 | #define HOUR_12 (1 << 7) | 88 | #define HOUR_12 (1 << 7) |
@@ -56,6 +92,9 @@ enum sec_rtc_reg { | |||
56 | #define ALARM1_STATUS (1 << 2) | 92 | #define ALARM1_STATUS (1 << 2) |
57 | #define UPDATE_AD (1 << 0) | 93 | #define UPDATE_AD (1 << 0) |
58 | 94 | ||
95 | #define S2MPS_ALARM0_STATUS (1 << 2) | ||
96 | #define S2MPS_ALARM1_STATUS (1 << 1) | ||
97 | |||
59 | /* RTC Control Register */ | 98 | /* RTC Control Register */ |
60 | #define BCD_EN_SHIFT 0 | 99 | #define BCD_EN_SHIFT 0 |
61 | #define BCD_EN_MASK (1 << BCD_EN_SHIFT) | 100 | #define BCD_EN_MASK (1 << BCD_EN_SHIFT) |
@@ -64,6 +103,10 @@ enum sec_rtc_reg { | |||
64 | /* RTC Update Register1 */ | 103 | /* RTC Update Register1 */ |
65 | #define RTC_UDR_SHIFT 0 | 104 | #define RTC_UDR_SHIFT 0 |
66 | #define RTC_UDR_MASK (1 << RTC_UDR_SHIFT) | 105 | #define RTC_UDR_MASK (1 << RTC_UDR_SHIFT) |
106 | #define S2MPS_RTC_WUDR_SHIFT 4 | ||
107 | #define S2MPS_RTC_WUDR_MASK (1 << S2MPS_RTC_WUDR_SHIFT) | ||
108 | #define S2MPS_RTC_RUDR_SHIFT 0 | ||
109 | #define S2MPS_RTC_RUDR_MASK (1 << S2MPS_RTC_RUDR_SHIFT) | ||
67 | #define RTC_TCON_SHIFT 1 | 110 | #define RTC_TCON_SHIFT 1 |
68 | #define RTC_TCON_MASK (1 << RTC_TCON_SHIFT) | 111 | #define RTC_TCON_MASK (1 << RTC_TCON_SHIFT) |
69 | #define RTC_TIME_EN_SHIFT 3 | 112 | #define RTC_TIME_EN_SHIFT 3 |
diff --git a/include/linux/mfd/samsung/s2mps14.h b/include/linux/mfd/samsung/s2mps14.h new file mode 100644 index 000000000000..ec1e0857ddde --- /dev/null +++ b/include/linux/mfd/samsung/s2mps14.h | |||
@@ -0,0 +1,152 @@ | |||
1 | /* | ||
2 | * s2mps14.h | ||
3 | * | ||
4 | * Copyright (c) 2014 Samsung Electronics Co., Ltd | ||
5 | * http://www.samsung.com | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #ifndef __LINUX_MFD_S2MPS14_H | ||
20 | #define __LINUX_MFD_S2MPS14_H | ||
21 | |||
22 | /* S2MPS14 registers */ | ||
23 | enum s2mps14_reg { | ||
24 | S2MPS14_REG_ID, | ||
25 | S2MPS14_REG_INT1, | ||
26 | S2MPS14_REG_INT2, | ||
27 | S2MPS14_REG_INT3, | ||
28 | S2MPS14_REG_INT1M, | ||
29 | S2MPS14_REG_INT2M, | ||
30 | S2MPS14_REG_INT3M, | ||
31 | S2MPS14_REG_ST1, | ||
32 | S2MPS14_REG_ST2, | ||
33 | S2MPS14_REG_PWRONSRC, | ||
34 | S2MPS14_REG_OFFSRC, | ||
35 | S2MPS14_REG_BU_CHG, | ||
36 | S2MPS14_REG_RTCCTRL, | ||
37 | S2MPS14_REG_CTRL1, | ||
38 | S2MPS14_REG_CTRL2, | ||
39 | S2MPS14_REG_RSVD1, | ||
40 | S2MPS14_REG_RSVD2, | ||
41 | S2MPS14_REG_RSVD3, | ||
42 | S2MPS14_REG_RSVD4, | ||
43 | S2MPS14_REG_RSVD5, | ||
44 | S2MPS14_REG_RSVD6, | ||
45 | S2MPS14_REG_CTRL3, | ||
46 | S2MPS14_REG_RSVD7, | ||
47 | S2MPS14_REG_RSVD8, | ||
48 | S2MPS14_REG_WRSTBI, | ||
49 | S2MPS14_REG_B1CTRL1, | ||
50 | S2MPS14_REG_B1CTRL2, | ||
51 | S2MPS14_REG_B2CTRL1, | ||
52 | S2MPS14_REG_B2CTRL2, | ||
53 | S2MPS14_REG_B3CTRL1, | ||
54 | S2MPS14_REG_B3CTRL2, | ||
55 | S2MPS14_REG_B4CTRL1, | ||
56 | S2MPS14_REG_B4CTRL2, | ||
57 | S2MPS14_REG_B5CTRL1, | ||
58 | S2MPS14_REG_B5CTRL2, | ||
59 | S2MPS14_REG_L1CTRL, | ||
60 | S2MPS14_REG_L2CTRL, | ||
61 | S2MPS14_REG_L3CTRL, | ||
62 | S2MPS14_REG_L4CTRL, | ||
63 | S2MPS14_REG_L5CTRL, | ||
64 | S2MPS14_REG_L6CTRL, | ||
65 | S2MPS14_REG_L7CTRL, | ||
66 | S2MPS14_REG_L8CTRL, | ||
67 | S2MPS14_REG_L9CTRL, | ||
68 | S2MPS14_REG_L10CTRL, | ||
69 | S2MPS14_REG_L11CTRL, | ||
70 | S2MPS14_REG_L12CTRL, | ||
71 | S2MPS14_REG_L13CTRL, | ||
72 | S2MPS14_REG_L14CTRL, | ||
73 | S2MPS14_REG_L15CTRL, | ||
74 | S2MPS14_REG_L16CTRL, | ||
75 | S2MPS14_REG_L17CTRL, | ||
76 | S2MPS14_REG_L18CTRL, | ||
77 | S2MPS14_REG_L19CTRL, | ||
78 | S2MPS14_REG_L20CTRL, | ||
79 | S2MPS14_REG_L21CTRL, | ||
80 | S2MPS14_REG_L22CTRL, | ||
81 | S2MPS14_REG_L23CTRL, | ||
82 | S2MPS14_REG_L24CTRL, | ||
83 | S2MPS14_REG_L25CTRL, | ||
84 | S2MPS14_REG_LDODSCH1, | ||
85 | S2MPS14_REG_LDODSCH2, | ||
86 | S2MPS14_REG_LDODSCH3, | ||
87 | }; | ||
88 | |||
89 | /* S2MPS14 regulator ids */ | ||
90 | enum s2mps14_regulators { | ||
91 | S2MPS14_LDO1, | ||
92 | S2MPS14_LDO2, | ||
93 | S2MPS14_LDO3, | ||
94 | S2MPS14_LDO4, | ||
95 | S2MPS14_LDO5, | ||
96 | S2MPS14_LDO6, | ||
97 | S2MPS14_LDO7, | ||
98 | S2MPS14_LDO8, | ||
99 | S2MPS14_LDO9, | ||
100 | S2MPS14_LDO10, | ||
101 | S2MPS14_LDO11, | ||
102 | S2MPS14_LDO12, | ||
103 | S2MPS14_LDO13, | ||
104 | S2MPS14_LDO14, | ||
105 | S2MPS14_LDO15, | ||
106 | S2MPS14_LDO16, | ||
107 | S2MPS14_LDO17, | ||
108 | S2MPS14_LDO18, | ||
109 | S2MPS14_LDO19, | ||
110 | S2MPS14_LDO20, | ||
111 | S2MPS14_LDO21, | ||
112 | S2MPS14_LDO22, | ||
113 | S2MPS14_LDO23, | ||
114 | S2MPS14_LDO24, | ||
115 | S2MPS14_LDO25, | ||
116 | S2MPS14_BUCK1, | ||
117 | S2MPS14_BUCK2, | ||
118 | S2MPS14_BUCK3, | ||
119 | S2MPS14_BUCK4, | ||
120 | S2MPS14_BUCK5, | ||
121 | |||
122 | S2MPS14_REGULATOR_MAX, | ||
123 | }; | ||
124 | |||
125 | /* Regulator constraints for BUCKx */ | ||
126 | #define S2MPS14_BUCK1235_MIN_600MV 600000 | ||
127 | #define S2MPS14_BUCK4_MIN_1400MV 1400000 | ||
128 | #define S2MPS14_BUCK1235_STEP_6_25MV 6250 | ||
129 | #define S2MPS14_BUCK4_STEP_12_5MV 12500 | ||
130 | #define S2MPS14_BUCK1235_START_SEL 0x20 | ||
131 | #define S2MPS14_BUCK4_START_SEL 0x40 | ||
132 | /* | ||
133 | * Default ramp delay in uv/us. Datasheet says that ramp delay can be | ||
134 | * controlled however it does not specify which register is used for that. | ||
135 | * Let's assume that default value will be set. | ||
136 | */ | ||
137 | #define S2MPS14_BUCK_RAMP_DELAY 12500 | ||
138 | |||
139 | /* Regulator constraints for different types of LDOx */ | ||
140 | #define S2MPS14_LDO_MIN_800MV 800000 | ||
141 | #define S2MPS14_LDO_MIN_1800MV 1800000 | ||
142 | #define S2MPS14_LDO_STEP_12_5MV 12500 | ||
143 | #define S2MPS14_LDO_STEP_25MV 25000 | ||
144 | |||
145 | #define S2MPS14_LDO_VSEL_MASK 0x3F | ||
146 | #define S2MPS14_BUCK_VSEL_MASK 0xFF | ||
147 | #define S2MPS14_ENABLE_MASK (0x03 << S2MPS14_ENABLE_SHIFT) | ||
148 | #define S2MPS14_ENABLE_SHIFT 6 | ||
149 | #define S2MPS14_LDO_N_VOLTAGES (S2MPS14_LDO_VSEL_MASK + 1) | ||
150 | #define S2MPS14_BUCK_N_VOLTAGES (S2MPS14_BUCK_VSEL_MASK + 1) | ||
151 | |||
152 | #endif /* __LINUX_MFD_S2MPS14_H */ | ||