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authorDmitry Baryshkov <dbaryshkov@gmail.com>2008-06-22 07:01:58 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-07-07 08:22:01 -0400
commitd6315949ac5527efd00d48283a9e33361c86e8e9 (patch)
tree6da052f59a41647eb97bc11836c715fb51eb4293 /include/linux/mfd
parentb032fccca80cbbedaa80e5a72a202a43f08aa97e (diff)
[ARM] 5096/2: Support Toshiba TC6393XB Mobile I/O Controller.
Add support for Toshiba TC6393XB companion chip. Currently only GPIO and part of IRQ features of the device are supported. Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/linux/mfd')
-rw-r--r--include/linux/mfd/tc6393xb.h47
1 files changed, 47 insertions, 0 deletions
diff --git a/include/linux/mfd/tc6393xb.h b/include/linux/mfd/tc6393xb.h
new file mode 100644
index 000000000000..0e3dd4ca523b
--- /dev/null
+++ b/include/linux/mfd/tc6393xb.h
@@ -0,0 +1,47 @@
1/*
2 * Toshiba TC6393XB SoC support
3 *
4 * Copyright(c) 2005-2006 Chris Humbert
5 * Copyright(c) 2005 Dirk Opfer
6 * Copyright(c) 2005 Ian Molton <spyro@f2s.com>
7 * Copyright(c) 2007 Dmitry Baryshkov
8 *
9 * Based on code written by Sharp/Lineo for 2.4 kernels
10 * Based on locomo.c
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17#ifndef TC6393XB_H
18#define TC6393XB_H
19
20/* Also one should provide the CK3P6MI clock */
21struct tc6393xb_platform_data {
22 u16 scr_pll2cr; /* PLL2 Control */
23 u16 scr_gper; /* GP Enable */
24 u32 scr_gpo_doecr; /* GPO Data OE Control */
25 u32 scr_gpo_dsr; /* GPO Data Set */
26
27 int (*enable)(struct platform_device *dev);
28 int (*disable)(struct platform_device *dev);
29 int (*suspend)(struct platform_device *dev);
30 int (*resume)(struct platform_device *dev);
31
32 int irq_base; /* a base for cascaded irq */
33 int gpio_base;
34};
35
36/*
37 * Relative to irq_base
38 */
39#define IRQ_TC6393_NAND 0
40#define IRQ_TC6393_MMC 1
41#define IRQ_TC6393_OHCI 2
42#define IRQ_TC6393_SERIAL 3
43#define IRQ_TC6393_FB 4
44
45#define TC6393XB_NR_IRQS 8
46
47#endif