diff options
| author | Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> | 2011-05-16 19:35:42 -0400 |
|---|---|---|
| committer | Liam Girdwood <lrg@slimlogic.co.uk> | 2011-05-27 05:49:29 -0400 |
| commit | 11ad14f86a7847b084d3e3f114180be39b1c7322 (patch) | |
| tree | 0d91d1bd52fbf8e65195fe870d8f2746b7d53ec5 /include/linux/mfd | |
| parent | 83545d836cf12a6381b530c5c7aeacf057f86aa9 (diff) | |
TPS65911: Add support for added GPIO lines
GPIO 1 to 8 are added for TPS65911 chip version. The gpio driver
now handles more than one gpio lines. Subsequent versions of the
chip family can add new GPIO lines with minimal driver changes.
Signed-off-by: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/tps65910.h | 90 |
1 files changed, 14 insertions, 76 deletions
diff --git a/include/linux/mfd/tps65910.h b/include/linux/mfd/tps65910.h index 32bb7b81f713..5f770064e0c5 100644 --- a/include/linux/mfd/tps65910.h +++ b/include/linux/mfd/tps65910.h | |||
| @@ -101,6 +101,9 @@ | |||
| 101 | #define TPS65910_GPIO3 0x63 | 101 | #define TPS65910_GPIO3 0x63 |
| 102 | #define TPS65910_GPIO4 0x64 | 102 | #define TPS65910_GPIO4 0x64 |
| 103 | #define TPS65910_GPIO5 0x65 | 103 | #define TPS65910_GPIO5 0x65 |
| 104 | #define TPS65910_GPIO6 0x66 | ||
| 105 | #define TPS65910_GPIO7 0x67 | ||
| 106 | #define TPS65910_GPIO8 0x68 | ||
| 104 | #define TPS65910_JTAGVERNUM 0x80 | 107 | #define TPS65910_JTAGVERNUM 0x80 |
| 105 | #define TPS65910_MAX_REGISTER 0x80 | 108 | #define TPS65910_MAX_REGISTER 0x80 |
| 106 | 109 | ||
| @@ -650,82 +653,17 @@ | |||
| 650 | #define INT_MSK3_GPIO4_R_IT_MSK_SHIFT 0 | 653 | #define INT_MSK3_GPIO4_R_IT_MSK_SHIFT 0 |
| 651 | 654 | ||
| 652 | 655 | ||
| 653 | /*Register GPIO0 (0x80) register.RegisterDescription */ | 656 | /*Register GPIO (0x80) register.RegisterDescription */ |
| 654 | #define GPIO0_GPIO_DEB_MASK 0x10 | 657 | #define GPIO_DEB_MASK 0x10 |
| 655 | #define GPIO0_GPIO_DEB_SHIFT 4 | 658 | #define GPIO_DEB_SHIFT 4 |
| 656 | #define GPIO0_GPIO_PUEN_MASK 0x08 | 659 | #define GPIO_PUEN_MASK 0x08 |
| 657 | #define GPIO0_GPIO_PUEN_SHIFT 3 | 660 | #define GPIO_PUEN_SHIFT 3 |
| 658 | #define GPIO0_GPIO_CFG_MASK 0x04 | 661 | #define GPIO_CFG_MASK 0x04 |
| 659 | #define GPIO0_GPIO_CFG_SHIFT 2 | 662 | #define GPIO_CFG_SHIFT 2 |
| 660 | #define GPIO0_GPIO_STS_MASK 0x02 | 663 | #define GPIO_STS_MASK 0x02 |
| 661 | #define GPIO0_GPIO_STS_SHIFT 1 | 664 | #define GPIO_STS_SHIFT 1 |
| 662 | #define GPIO0_GPIO_SET_MASK 0x01 | 665 | #define GPIO_SET_MASK 0x01 |
| 663 | #define GPIO0_GPIO_SET_SHIFT 0 | 666 | #define GPIO_SET_SHIFT 0 |
| 664 | |||
| 665 | |||
| 666 | /*Register GPIO1 (0x80) register.RegisterDescription */ | ||
| 667 | #define GPIO1_GPIO_DEB_MASK 0x10 | ||
| 668 | #define GPIO1_GPIO_DEB_SHIFT 4 | ||
| 669 | #define GPIO1_GPIO_PUEN_MASK 0x08 | ||
| 670 | #define GPIO1_GPIO_PUEN_SHIFT 3 | ||
| 671 | #define GPIO1_GPIO_CFG_MASK 0x04 | ||
| 672 | #define GPIO1_GPIO_CFG_SHIFT 2 | ||
| 673 | #define GPIO1_GPIO_STS_MASK 0x02 | ||
| 674 | #define GPIO1_GPIO_STS_SHIFT 1 | ||
| 675 | #define GPIO1_GPIO_SET_MASK 0x01 | ||
| 676 | #define GPIO1_GPIO_SET_SHIFT 0 | ||
| 677 | |||
| 678 | |||
| 679 | /*Register GPIO2 (0x80) register.RegisterDescription */ | ||
| 680 | #define GPIO2_GPIO_DEB_MASK 0x10 | ||
| 681 | #define GPIO2_GPIO_DEB_SHIFT 4 | ||
| 682 | #define GPIO2_GPIO_PUEN_MASK 0x08 | ||
| 683 | #define GPIO2_GPIO_PUEN_SHIFT 3 | ||
| 684 | #define GPIO2_GPIO_CFG_MASK 0x04 | ||
| 685 | #define GPIO2_GPIO_CFG_SHIFT 2 | ||
| 686 | #define GPIO2_GPIO_STS_MASK 0x02 | ||
| 687 | #define GPIO2_GPIO_STS_SHIFT 1 | ||
| 688 | #define GPIO2_GPIO_SET_MASK 0x01 | ||
| 689 | #define GPIO2_GPIO_SET_SHIFT 0 | ||
| 690 | |||
| 691 | |||
| 692 | /*Register GPIO3 (0x80) register.RegisterDescription */ | ||
| 693 | #define GPIO3_GPIO_DEB_MASK 0x10 | ||
| 694 | #define GPIO3_GPIO_DEB_SHIFT 4 | ||
| 695 | #define GPIO3_GPIO_PUEN_MASK 0x08 | ||
| 696 | #define GPIO3_GPIO_PUEN_SHIFT 3 | ||
| 697 | #define GPIO3_GPIO_CFG_MASK 0x04 | ||
| 698 | #define GPIO3_GPIO_CFG_SHIFT 2 | ||
| 699 | #define GPIO3_GPIO_STS_MASK 0x02 | ||
| 700 | #define GPIO3_GPIO_STS_SHIFT 1 | ||
| 701 | #define GPIO3_GPIO_SET_MASK 0x01 | ||
| 702 | #define GPIO3_GPIO_SET_SHIFT 0 | ||
| 703 | |||
| 704 | |||
| 705 | /*Register GPIO4 (0x80) register.RegisterDescription */ | ||
| 706 | #define GPIO4_GPIO_DEB_MASK 0x10 | ||
| 707 | #define GPIO4_GPIO_DEB_SHIFT 4 | ||
| 708 | #define GPIO4_GPIO_PUEN_MASK 0x08 | ||
| 709 | #define GPIO4_GPIO_PUEN_SHIFT 3 | ||
| 710 | #define GPIO4_GPIO_CFG_MASK 0x04 | ||
| 711 | #define GPIO4_GPIO_CFG_SHIFT 2 | ||
| 712 | #define GPIO4_GPIO_STS_MASK 0x02 | ||
| 713 | #define GPIO4_GPIO_STS_SHIFT 1 | ||
| 714 | #define GPIO4_GPIO_SET_MASK 0x01 | ||
| 715 | #define GPIO4_GPIO_SET_SHIFT 0 | ||
| 716 | |||
| 717 | |||
| 718 | /*Register GPIO5 (0x80) register.RegisterDescription */ | ||
| 719 | #define GPIO5_GPIO_DEB_MASK 0x10 | ||
| 720 | #define GPIO5_GPIO_DEB_SHIFT 4 | ||
| 721 | #define GPIO5_GPIO_PUEN_MASK 0x08 | ||
| 722 | #define GPIO5_GPIO_PUEN_SHIFT 3 | ||
| 723 | #define GPIO5_GPIO_CFG_MASK 0x04 | ||
| 724 | #define GPIO5_GPIO_CFG_SHIFT 2 | ||
| 725 | #define GPIO5_GPIO_STS_MASK 0x02 | ||
| 726 | #define GPIO5_GPIO_STS_SHIFT 1 | ||
| 727 | #define GPIO5_GPIO_SET_MASK 0x01 | ||
| 728 | #define GPIO5_GPIO_SET_SHIFT 0 | ||
| 729 | 667 | ||
| 730 | 668 | ||
| 731 | /*Register JTAGVERNUM (0x80) register.RegisterDescription */ | 669 | /*Register JTAGVERNUM (0x80) register.RegisterDescription */ |