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authorMark Brown <broonie@opensource.wolfsonmicro.com>2008-10-10 10:58:10 -0400
committerLiam Girdwood <lrg@slimlogic.co.uk>2008-10-13 16:51:55 -0400
commit89b4012befb1abca5e86d232bc0e2a797b0d9825 (patch)
tree948e0ed0c35df087f0069356650da431a9fe50ff /include/linux/mfd/wm8350
parent213f326810b6852bc54f38fd8bb71793f70f2c7a (diff)
mfd: Core support for the WM8350 AudioPlus PMIC
The WM8350 is an integrated audio and power management subsystem intended for use as the primary PMIC in mobile multimedia applications. The WM8350 can be controlled via either I2C or SPI - the control interface is provided by a separate module in order to allow greatest flexibility in configuring the kernel. This driver was originally written by Liam Girdwood and has since been updated to current kernel APIs and split up for submission by me. All the heavy lifting here was done by Liam. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Samuel Ortiz <sameo@openedhand.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'include/linux/mfd/wm8350')
-rw-r--r--include/linux/mfd/wm8350/core.h585
1 files changed, 585 insertions, 0 deletions
diff --git a/include/linux/mfd/wm8350/core.h b/include/linux/mfd/wm8350/core.h
new file mode 100644
index 000000000000..94778c1669dc
--- /dev/null
+++ b/include/linux/mfd/wm8350/core.h
@@ -0,0 +1,585 @@
1/*
2 * core.h -- Core Driver for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 */
12
13#ifndef __LINUX_MFD_WM8350_CORE_H_
14#define __LINUX_MFD_WM8350_CORE_H_
15
16#include <linux/kernel.h>
17#include <linux/mutex.h>
18#include <linux/workqueue.h>
19
20/*
21 * Register values.
22 */
23#define WM8350_RESET_ID 0x00
24#define WM8350_ID 0x01
25#define WM8350_SYSTEM_CONTROL_1 0x03
26#define WM8350_SYSTEM_CONTROL_2 0x04
27#define WM8350_SYSTEM_HIBERNATE 0x05
28#define WM8350_INTERFACE_CONTROL 0x06
29#define WM8350_POWER_MGMT_1 0x08
30#define WM8350_POWER_MGMT_2 0x09
31#define WM8350_POWER_MGMT_3 0x0A
32#define WM8350_POWER_MGMT_4 0x0B
33#define WM8350_POWER_MGMT_5 0x0C
34#define WM8350_POWER_MGMT_6 0x0D
35#define WM8350_POWER_MGMT_7 0x0E
36
37#define WM8350_SYSTEM_INTERRUPTS 0x18
38#define WM8350_INT_STATUS_1 0x19
39#define WM8350_INT_STATUS_2 0x1A
40#define WM8350_POWER_UP_INT_STATUS 0x1B
41#define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
42#define WM8350_OVER_CURRENT_INT_STATUS 0x1D
43#define WM8350_GPIO_INT_STATUS 0x1E
44#define WM8350_COMPARATOR_INT_STATUS 0x1F
45#define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
46#define WM8350_INT_STATUS_1_MASK 0x21
47#define WM8350_INT_STATUS_2_MASK 0x22
48#define WM8350_POWER_UP_INT_STATUS_MASK 0x23
49#define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
50#define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
51#define WM8350_GPIO_INT_STATUS_MASK 0x26
52#define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
53
54#define WM8350_MAX_REGISTER 0xFF
55
56/*
57 * Field Definitions.
58 */
59
60/*
61 * R0 (0x00) - Reset/ID
62 */
63#define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
64
65/*
66 * R1 (0x01) - ID
67 */
68#define WM8350_CHIP_REV_MASK 0x7000
69#define WM8350_CONF_STS_MASK 0x0C00
70#define WM8350_CUST_ID_MASK 0x00FF
71
72/*
73 * R3 (0x03) - System Control 1
74 */
75#define WM8350_CHIP_ON 0x8000
76#define WM8350_POWERCYCLE 0x2000
77#define WM8350_VCC_FAULT_OV 0x1000
78#define WM8350_REG_RSTB_TIME_MASK 0x0C00
79#define WM8350_BG_SLEEP 0x0200
80#define WM8350_MEM_VALID 0x0020
81#define WM8350_CHIP_SET_UP 0x0010
82#define WM8350_ON_DEB_T 0x0008
83#define WM8350_ON_POL 0x0002
84#define WM8350_IRQ_POL 0x0001
85
86/*
87 * R4 (0x04) - System Control 2
88 */
89#define WM8350_USB_SUSPEND_8MA 0x8000
90#define WM8350_USB_SUSPEND 0x4000
91#define WM8350_USB_MSTR 0x2000
92#define WM8350_USB_MSTR_SRC 0x1000
93#define WM8350_USB_500MA 0x0800
94#define WM8350_USB_NOLIM 0x0400
95
96/*
97 * R5 (0x05) - System Hibernate
98 */
99#define WM8350_HIBERNATE 0x8000
100#define WM8350_WDOG_HIB_MODE 0x0080
101#define WM8350_REG_HIB_STARTUP_SEQ 0x0040
102#define WM8350_REG_RESET_HIB_MODE 0x0020
103#define WM8350_RST_HIB_MODE 0x0010
104#define WM8350_IRQ_HIB_MODE 0x0008
105#define WM8350_MEMRST_HIB_MODE 0x0004
106#define WM8350_PCCOMP_HIB_MODE 0x0002
107#define WM8350_TEMPMON_HIB_MODE 0x0001
108
109/*
110 * R6 (0x06) - Interface Control
111 */
112#define WM8350_USE_DEV_PINS 0x8000
113#define WM8350_USE_DEV_PINS_MASK 0x8000
114#define WM8350_USE_DEV_PINS_SHIFT 15
115#define WM8350_DEV_ADDR_MASK 0x6000
116#define WM8350_DEV_ADDR_SHIFT 13
117#define WM8350_CONFIG_DONE 0x1000
118#define WM8350_CONFIG_DONE_MASK 0x1000
119#define WM8350_CONFIG_DONE_SHIFT 12
120#define WM8350_RECONFIG_AT_ON 0x0800
121#define WM8350_RECONFIG_AT_ON_MASK 0x0800
122#define WM8350_RECONFIG_AT_ON_SHIFT 11
123#define WM8350_AUTOINC 0x0200
124#define WM8350_AUTOINC_MASK 0x0200
125#define WM8350_AUTOINC_SHIFT 9
126#define WM8350_ARA 0x0100
127#define WM8350_ARA_MASK 0x0100
128#define WM8350_ARA_SHIFT 8
129#define WM8350_SPI_CFG 0x0008
130#define WM8350_SPI_CFG_MASK 0x0008
131#define WM8350_SPI_CFG_SHIFT 3
132#define WM8350_SPI_4WIRE 0x0004
133#define WM8350_SPI_4WIRE_MASK 0x0004
134#define WM8350_SPI_4WIRE_SHIFT 2
135#define WM8350_SPI_3WIRE 0x0002
136#define WM8350_SPI_3WIRE_MASK 0x0002
137#define WM8350_SPI_3WIRE_SHIFT 1
138
139/* Bit values for R06 (0x06) */
140#define WM8350_USE_DEV_PINS_PRIMARY 0
141#define WM8350_USE_DEV_PINS_DEV 1
142
143#define WM8350_DEV_ADDR_34 0
144#define WM8350_DEV_ADDR_36 1
145#define WM8350_DEV_ADDR_3C 2
146#define WM8350_DEV_ADDR_3E 3
147
148#define WM8350_CONFIG_DONE_OFF 0
149#define WM8350_CONFIG_DONE_DONE 1
150
151#define WM8350_RECONFIG_AT_ON_OFF 0
152#define WM8350_RECONFIG_AT_ON_ON 1
153
154#define WM8350_AUTOINC_OFF 0
155#define WM8350_AUTOINC_ON 1
156
157#define WM8350_ARA_OFF 0
158#define WM8350_ARA_ON 1
159
160#define WM8350_SPI_CFG_CMOS 0
161#define WM8350_SPI_CFG_OD 1
162
163#define WM8350_SPI_4WIRE_3WIRE 0
164#define WM8350_SPI_4WIRE_4WIRE 1
165
166#define WM8350_SPI_3WIRE_I2C 0
167#define WM8350_SPI_3WIRE_SPI 1
168
169/*
170 * R8 (0x08) - Power mgmt (1)
171 */
172#define WM8350_CODEC_ISEL_MASK 0xC000
173#define WM8350_VBUFEN 0x2000
174#define WM8350_OUTPUT_DRAIN_EN 0x0400
175#define WM8350_MIC_DET_ENA 0x0100
176#define WM8350_BIASEN 0x0020
177#define WM8350_MICBEN 0x0010
178#define WM8350_VMIDEN 0x0004
179#define WM8350_VMID_MASK 0x0003
180#define WM8350_VMID_SHIFT 0
181
182/*
183 * R9 (0x09) - Power mgmt (2)
184 */
185#define WM8350_IN3R_ENA 0x0800
186#define WM8350_IN3L_ENA 0x0400
187#define WM8350_INR_ENA 0x0200
188#define WM8350_INL_ENA 0x0100
189#define WM8350_MIXINR_ENA 0x0080
190#define WM8350_MIXINL_ENA 0x0040
191#define WM8350_OUT4_ENA 0x0020
192#define WM8350_OUT3_ENA 0x0010
193#define WM8350_MIXOUTR_ENA 0x0002
194#define WM8350_MIXOUTL_ENA 0x0001
195
196/*
197 * R10 (0x0A) - Power mgmt (3)
198 */
199#define WM8350_IN3R_TO_OUT2R 0x0080
200#define WM8350_OUT2R_ENA 0x0008
201#define WM8350_OUT2L_ENA 0x0004
202#define WM8350_OUT1R_ENA 0x0002
203#define WM8350_OUT1L_ENA 0x0001
204
205/*
206 * R11 (0x0B) - Power mgmt (4)
207 */
208#define WM8350_SYSCLK_ENA 0x4000
209#define WM8350_ADC_HPF_ENA 0x2000
210#define WM8350_FLL_ENA 0x0800
211#define WM8350_FLL_OSC_ENA 0x0400
212#define WM8350_TOCLK_ENA 0x0100
213#define WM8350_DACR_ENA 0x0020
214#define WM8350_DACL_ENA 0x0010
215#define WM8350_ADCR_ENA 0x0008
216#define WM8350_ADCL_ENA 0x0004
217
218/*
219 * R12 (0x0C) - Power mgmt (5)
220 */
221#define WM8350_CODEC_ENA 0x1000
222#define WM8350_RTC_TICK_ENA 0x0800
223#define WM8350_OSC32K_ENA 0x0400
224#define WM8350_CHG_ENA 0x0200
225#define WM8350_ACC_DET_ENA 0x0100
226#define WM8350_AUXADC_ENA 0x0080
227#define WM8350_DCMP4_ENA 0x0008
228#define WM8350_DCMP3_ENA 0x0004
229#define WM8350_DCMP2_ENA 0x0002
230#define WM8350_DCMP1_ENA 0x0001
231
232/*
233 * R13 (0x0D) - Power mgmt (6)
234 */
235#define WM8350_LS_ENA 0x8000
236#define WM8350_LDO4_ENA 0x0800
237#define WM8350_LDO3_ENA 0x0400
238#define WM8350_LDO2_ENA 0x0200
239#define WM8350_LDO1_ENA 0x0100
240#define WM8350_DC6_ENA 0x0020
241#define WM8350_DC5_ENA 0x0010
242#define WM8350_DC4_ENA 0x0008
243#define WM8350_DC3_ENA 0x0004
244#define WM8350_DC2_ENA 0x0002
245#define WM8350_DC1_ENA 0x0001
246
247/*
248 * R14 (0x0E) - Power mgmt (7)
249 */
250#define WM8350_CS2_ENA 0x0002
251#define WM8350_CS1_ENA 0x0001
252
253/*
254 * R24 (0x18) - System Interrupts
255 */
256#define WM8350_OC_INT 0x2000
257#define WM8350_UV_INT 0x1000
258#define WM8350_PUTO_INT 0x0800
259#define WM8350_CS_INT 0x0200
260#define WM8350_EXT_INT 0x0100
261#define WM8350_CODEC_INT 0x0080
262#define WM8350_GP_INT 0x0040
263#define WM8350_AUXADC_INT 0x0020
264#define WM8350_RTC_INT 0x0010
265#define WM8350_SYS_INT 0x0008
266#define WM8350_CHG_INT 0x0004
267#define WM8350_USB_INT 0x0002
268#define WM8350_WKUP_INT 0x0001
269
270/*
271 * R25 (0x19) - Interrupt Status 1
272 */
273#define WM8350_CHG_BAT_HOT_EINT 0x8000
274#define WM8350_CHG_BAT_COLD_EINT 0x4000
275#define WM8350_CHG_BAT_FAIL_EINT 0x2000
276#define WM8350_CHG_TO_EINT 0x1000
277#define WM8350_CHG_END_EINT 0x0800
278#define WM8350_CHG_START_EINT 0x0400
279#define WM8350_CHG_FAST_RDY_EINT 0x0200
280#define WM8350_RTC_PER_EINT 0x0080
281#define WM8350_RTC_SEC_EINT 0x0040
282#define WM8350_RTC_ALM_EINT 0x0020
283#define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
284#define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
285#define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
286
287/*
288 * R26 (0x1A) - Interrupt Status 2
289 */
290#define WM8350_CS1_EINT 0x2000
291#define WM8350_CS2_EINT 0x1000
292#define WM8350_USB_LIMIT_EINT 0x0400
293#define WM8350_AUXADC_DATARDY_EINT 0x0100
294#define WM8350_AUXADC_DCOMP4_EINT 0x0080
295#define WM8350_AUXADC_DCOMP3_EINT 0x0040
296#define WM8350_AUXADC_DCOMP2_EINT 0x0020
297#define WM8350_AUXADC_DCOMP1_EINT 0x0010
298#define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
299#define WM8350_SYS_CHIP_GT115_EINT 0x0004
300#define WM8350_SYS_CHIP_GT140_EINT 0x0002
301#define WM8350_SYS_WDOG_TO_EINT 0x0001
302
303/*
304 * R27 (0x1B) - Power Up Interrupt Status
305 */
306#define WM8350_PUTO_LDO4_EINT 0x0800
307#define WM8350_PUTO_LDO3_EINT 0x0400
308#define WM8350_PUTO_LDO2_EINT 0x0200
309#define WM8350_PUTO_LDO1_EINT 0x0100
310#define WM8350_PUTO_DC6_EINT 0x0020
311#define WM8350_PUTO_DC5_EINT 0x0010
312#define WM8350_PUTO_DC4_EINT 0x0008
313#define WM8350_PUTO_DC3_EINT 0x0004
314#define WM8350_PUTO_DC2_EINT 0x0002
315#define WM8350_PUTO_DC1_EINT 0x0001
316
317/*
318 * R28 (0x1C) - Under Voltage Interrupt status
319 */
320#define WM8350_UV_LDO4_EINT 0x0800
321#define WM8350_UV_LDO3_EINT 0x0400
322#define WM8350_UV_LDO2_EINT 0x0200
323#define WM8350_UV_LDO1_EINT 0x0100
324#define WM8350_UV_DC6_EINT 0x0020
325#define WM8350_UV_DC5_EINT 0x0010
326#define WM8350_UV_DC4_EINT 0x0008
327#define WM8350_UV_DC3_EINT 0x0004
328#define WM8350_UV_DC2_EINT 0x0002
329#define WM8350_UV_DC1_EINT 0x0001
330
331/*
332 * R29 (0x1D) - Over Current Interrupt status
333 */
334#define WM8350_OC_LS_EINT 0x8000
335
336/*
337 * R30 (0x1E) - GPIO Interrupt Status
338 */
339#define WM8350_GP12_EINT 0x1000
340#define WM8350_GP11_EINT 0x0800
341#define WM8350_GP10_EINT 0x0400
342#define WM8350_GP9_EINT 0x0200
343#define WM8350_GP8_EINT 0x0100
344#define WM8350_GP7_EINT 0x0080
345#define WM8350_GP6_EINT 0x0040
346#define WM8350_GP5_EINT 0x0020
347#define WM8350_GP4_EINT 0x0010
348#define WM8350_GP3_EINT 0x0008
349#define WM8350_GP2_EINT 0x0004
350#define WM8350_GP1_EINT 0x0002
351#define WM8350_GP0_EINT 0x0001
352
353/*
354 * R31 (0x1F) - Comparator Interrupt Status
355 */
356#define WM8350_EXT_USB_FB_EINT 0x8000
357#define WM8350_EXT_WALL_FB_EINT 0x4000
358#define WM8350_EXT_BAT_FB_EINT 0x2000
359#define WM8350_CODEC_JCK_DET_L_EINT 0x0800
360#define WM8350_CODEC_JCK_DET_R_EINT 0x0400
361#define WM8350_CODEC_MICSCD_EINT 0x0200
362#define WM8350_CODEC_MICD_EINT 0x0100
363#define WM8350_WKUP_OFF_STATE_EINT 0x0040
364#define WM8350_WKUP_HIB_STATE_EINT 0x0020
365#define WM8350_WKUP_CONV_FAULT_EINT 0x0010
366#define WM8350_WKUP_WDOG_RST_EINT 0x0008
367#define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
368#define WM8350_WKUP_ONKEY_EINT 0x0002
369#define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
370
371/*
372 * R32 (0x20) - System Interrupts Mask
373 */
374#define WM8350_IM_OC_INT 0x2000
375#define WM8350_IM_UV_INT 0x1000
376#define WM8350_IM_PUTO_INT 0x0800
377#define WM8350_IM_SPARE_INT 0x0400
378#define WM8350_IM_CS_INT 0x0200
379#define WM8350_IM_EXT_INT 0x0100
380#define WM8350_IM_CODEC_INT 0x0080
381#define WM8350_IM_GP_INT 0x0040
382#define WM8350_IM_AUXADC_INT 0x0020
383#define WM8350_IM_RTC_INT 0x0010
384#define WM8350_IM_SYS_INT 0x0008
385#define WM8350_IM_CHG_INT 0x0004
386#define WM8350_IM_USB_INT 0x0002
387#define WM8350_IM_WKUP_INT 0x0001
388
389/*
390 * R33 (0x21) - Interrupt Status 1 Mask
391 */
392#define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
393#define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
394#define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
395#define WM8350_IM_CHG_TO_EINT 0x1000
396#define WM8350_IM_CHG_END_EINT 0x0800
397#define WM8350_IM_CHG_START_EINT 0x0400
398#define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
399#define WM8350_IM_RTC_PER_EINT 0x0080
400#define WM8350_IM_RTC_SEC_EINT 0x0040
401#define WM8350_IM_RTC_ALM_EINT 0x0020
402#define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
403#define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
404#define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
405
406/*
407 * R34 (0x22) - Interrupt Status 2 Mask
408 */
409#define WM8350_IM_SPARE2_EINT 0x8000
410#define WM8350_IM_SPARE1_EINT 0x4000
411#define WM8350_IM_CS1_EINT 0x2000
412#define WM8350_IM_CS2_EINT 0x1000
413#define WM8350_IM_USB_LIMIT_EINT 0x0400
414#define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
415#define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
416#define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
417#define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
418#define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
419#define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
420#define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
421#define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
422#define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
423
424/*
425 * R35 (0x23) - Power Up Interrupt Status Mask
426 */
427#define WM8350_IM_PUTO_LDO4_EINT 0x0800
428#define WM8350_IM_PUTO_LDO3_EINT 0x0400
429#define WM8350_IM_PUTO_LDO2_EINT 0x0200
430#define WM8350_IM_PUTO_LDO1_EINT 0x0100
431#define WM8350_IM_PUTO_DC6_EINT 0x0020
432#define WM8350_IM_PUTO_DC5_EINT 0x0010
433#define WM8350_IM_PUTO_DC4_EINT 0x0008
434#define WM8350_IM_PUTO_DC3_EINT 0x0004
435#define WM8350_IM_PUTO_DC2_EINT 0x0002
436#define WM8350_IM_PUTO_DC1_EINT 0x0001
437
438/*
439 * R36 (0x24) - Under Voltage Interrupt status Mask
440 */
441#define WM8350_IM_UV_LDO4_EINT 0x0800
442#define WM8350_IM_UV_LDO3_EINT 0x0400
443#define WM8350_IM_UV_LDO2_EINT 0x0200
444#define WM8350_IM_UV_LDO1_EINT 0x0100
445#define WM8350_IM_UV_DC6_EINT 0x0020
446#define WM8350_IM_UV_DC5_EINT 0x0010
447#define WM8350_IM_UV_DC4_EINT 0x0008
448#define WM8350_IM_UV_DC3_EINT 0x0004
449#define WM8350_IM_UV_DC2_EINT 0x0002
450#define WM8350_IM_UV_DC1_EINT 0x0001
451
452/*
453 * R37 (0x25) - Over Current Interrupt status Mask
454 */
455#define WM8350_IM_OC_LS_EINT 0x8000
456
457/*
458 * R38 (0x26) - GPIO Interrupt Status Mask
459 */
460#define WM8350_IM_GP12_EINT 0x1000
461#define WM8350_IM_GP11_EINT 0x0800
462#define WM8350_IM_GP10_EINT 0x0400
463#define WM8350_IM_GP9_EINT 0x0200
464#define WM8350_IM_GP8_EINT 0x0100
465#define WM8350_IM_GP7_EINT 0x0080
466#define WM8350_IM_GP6_EINT 0x0040
467#define WM8350_IM_GP5_EINT 0x0020
468#define WM8350_IM_GP4_EINT 0x0010
469#define WM8350_IM_GP3_EINT 0x0008
470#define WM8350_IM_GP2_EINT 0x0004
471#define WM8350_IM_GP1_EINT 0x0002
472#define WM8350_IM_GP0_EINT 0x0001
473
474/*
475 * R39 (0x27) - Comparator Interrupt Status Mask
476 */
477#define WM8350_IM_EXT_USB_FB_EINT 0x8000
478#define WM8350_IM_EXT_WALL_FB_EINT 0x4000
479#define WM8350_IM_EXT_BAT_FB_EINT 0x2000
480#define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
481#define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
482#define WM8350_IM_CODEC_MICSCD_EINT 0x0200
483#define WM8350_IM_CODEC_MICD_EINT 0x0100
484#define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
485#define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
486#define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
487#define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
488#define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
489#define WM8350_IM_WKUP_ONKEY_EINT 0x0002
490#define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
491
492/*
493 * R220 (0xDC) - RAM BIST 1
494 */
495#define WM8350_READ_STATUS 0x0800
496#define WM8350_TSTRAM_CLK 0x0100
497#define WM8350_TSTRAM_CLK_ENA 0x0080
498#define WM8350_STARTSEQ 0x0040
499#define WM8350_READ_SRC 0x0020
500#define WM8350_COUNT_DIR 0x0010
501#define WM8350_TSTRAM_MODE_MASK 0x000E
502#define WM8350_TSTRAM_ENA 0x0001
503
504/*
505 * R225 (0xE1) - DCDC/LDO status
506 */
507#define WM8350_LS_STS 0x8000
508#define WM8350_LDO4_STS 0x0800
509#define WM8350_LDO3_STS 0x0400
510#define WM8350_LDO2_STS 0x0200
511#define WM8350_LDO1_STS 0x0100
512#define WM8350_DC6_STS 0x0020
513#define WM8350_DC5_STS 0x0010
514#define WM8350_DC4_STS 0x0008
515#define WM8350_DC3_STS 0x0004
516#define WM8350_DC2_STS 0x0002
517#define WM8350_DC1_STS 0x0001
518
519/* WM8350 wake up conditions */
520#define WM8350_IRQ_WKUP_OFF_STATE 43
521#define WM8350_IRQ_WKUP_HIB_STATE 44
522#define WM8350_IRQ_WKUP_CONV_FAULT 45
523#define WM8350_IRQ_WKUP_WDOG_RST 46
524#define WM8350_IRQ_WKUP_GP_PWR_ON 47
525#define WM8350_IRQ_WKUP_ONKEY 48
526#define WM8350_IRQ_WKUP_GP_WAKEUP 49
527
528/* wm8350 chip revisions */
529#define WM8350_REV_E 0x4
530#define WM8350_REV_F 0x5
531#define WM8350_REV_G 0x6
532
533struct wm8350_reg_access {
534 u16 readable; /* Mask of readable bits */
535 u16 writable; /* Mask of writable bits */
536 u16 vol; /* Mask of volatile bits */
537};
538extern const struct wm8350_reg_access wm8350_reg_io_map[];
539extern const u16 wm8350_mode0_defaults[];
540extern const u16 wm8350_mode1_defaults[];
541extern const u16 wm8350_mode2_defaults[];
542extern const u16 wm8350_mode3_defaults[];
543
544struct wm8350;
545
546struct wm8350_irq {
547 void (*handler) (struct wm8350 *, int, void *);
548 void *data;
549};
550
551struct wm8350 {
552 int rev; /* chip revision */
553
554 struct device *dev;
555
556 /* device IO */
557 union {
558 struct i2c_client *i2c_client;
559 struct spi_device *spi_device;
560 };
561 int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest);
562 int (*write_dev)(struct wm8350 *wm8350, char reg, int size,
563 void *src);
564 u16 *reg_cache;
565};
566
567/*
568 * WM8350 device initialisation and exit.
569 */
570int wm8350_device_init(struct wm8350 *wm8350);
571void wm8350_device_exit(struct wm8350 *wm8350);
572
573/*
574 * WM8350 device IO
575 */
576int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
577int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
578u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
579int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
580int wm8350_reg_lock(struct wm8350 *wm8350);
581int wm8350_reg_unlock(struct wm8350 *wm8350);
582int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
583int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
584
585#endif