diff options
author | Chanwoo Choi <cw00.choi@samsung.com> | 2012-11-26 19:40:32 -0500 |
---|---|---|
committer | Chanwoo Choi <cw00.choi@samsung.com> | 2013-01-15 01:42:14 -0500 |
commit | 154f757fd315270e42bd17f4a68d84bd070e5758 (patch) | |
tree | c7b107c638428d0d959672fe00be356f1cdff8ed /include/linux/mfd/max77693-private.h | |
parent | 9931faca02c604c22335f5a935a501bb2ace6e20 (diff) |
extcon: max77693: Remove duplicate code by making function
This patch make max77693-muic_get_cable_type() function to remove
duplicate code because almost internal function need to read
adc/adc1k/adclow/chg_type value of MUIC register. Also, this patch
add description of internal function move field constant of muic device
from extcon-max77693 driver to max77693 header file because of it
is needed for masking some interrupt through platform data.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Myungjoo Ham <myungjoo.ham@samsung.com>
Diffstat (limited to 'include/linux/mfd/max77693-private.h')
-rw-r--r-- | include/linux/mfd/max77693-private.h | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h index 1eeae5c07915..5b18ecde69b5 100644 --- a/include/linux/mfd/max77693-private.h +++ b/include/linux/mfd/max77693-private.h | |||
@@ -106,6 +106,92 @@ enum max77693_muic_reg { | |||
106 | MAX77693_MUIC_REG_END, | 106 | MAX77693_MUIC_REG_END, |
107 | }; | 107 | }; |
108 | 108 | ||
109 | /* MAX77693 MUIC - STATUS1~3 Register */ | ||
110 | #define STATUS1_ADC_SHIFT (0) | ||
111 | #define STATUS1_ADCLOW_SHIFT (5) | ||
112 | #define STATUS1_ADCERR_SHIFT (6) | ||
113 | #define STATUS1_ADC1K_SHIFT (7) | ||
114 | #define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT) | ||
115 | #define STATUS1_ADCLOW_MASK (0x1 << STATUS1_ADCLOW_SHIFT) | ||
116 | #define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT) | ||
117 | #define STATUS1_ADC1K_MASK (0x1 << STATUS1_ADC1K_SHIFT) | ||
118 | |||
119 | #define STATUS2_CHGTYP_SHIFT (0) | ||
120 | #define STATUS2_CHGDETRUN_SHIFT (3) | ||
121 | #define STATUS2_DCDTMR_SHIFT (4) | ||
122 | #define STATUS2_DXOVP_SHIFT (5) | ||
123 | #define STATUS2_VBVOLT_SHIFT (6) | ||
124 | #define STATUS2_VIDRM_SHIFT (7) | ||
125 | #define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT) | ||
126 | #define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT) | ||
127 | #define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT) | ||
128 | #define STATUS2_DXOVP_MASK (0x1 << STATUS2_DXOVP_SHIFT) | ||
129 | #define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT) | ||
130 | #define STATUS2_VIDRM_MASK (0x1 << STATUS2_VIDRM_SHIFT) | ||
131 | |||
132 | #define STATUS3_OVP_SHIFT (2) | ||
133 | #define STATUS3_OVP_MASK (0x1 << STATUS3_OVP_SHIFT) | ||
134 | |||
135 | /* MAX77693 CDETCTRL1~2 register */ | ||
136 | #define CDETCTRL1_CHGDETEN_SHIFT (0) | ||
137 | #define CDETCTRL1_CHGTYPMAN_SHIFT (1) | ||
138 | #define CDETCTRL1_DCDEN_SHIFT (2) | ||
139 | #define CDETCTRL1_DCD2SCT_SHIFT (3) | ||
140 | #define CDETCTRL1_CDDELAY_SHIFT (4) | ||
141 | #define CDETCTRL1_DCDCPL_SHIFT (5) | ||
142 | #define CDETCTRL1_CDPDET_SHIFT (7) | ||
143 | #define CDETCTRL1_CHGDETEN_MASK (0x1 << CDETCTRL1_CHGDETEN_SHIFT) | ||
144 | #define CDETCTRL1_CHGTYPMAN_MASK (0x1 << CDETCTRL1_CHGTYPMAN_SHIFT) | ||
145 | #define CDETCTRL1_DCDEN_MASK (0x1 << CDETCTRL1_DCDEN_SHIFT) | ||
146 | #define CDETCTRL1_DCD2SCT_MASK (0x1 << CDETCTRL1_DCD2SCT_SHIFT) | ||
147 | #define CDETCTRL1_CDDELAY_MASK (0x1 << CDETCTRL1_CDDELAY_SHIFT) | ||
148 | #define CDETCTRL1_DCDCPL_MASK (0x1 << CDETCTRL1_DCDCPL_SHIFT) | ||
149 | #define CDETCTRL1_CDPDET_MASK (0x1 << CDETCTRL1_CDPDET_SHIFT) | ||
150 | |||
151 | #define CDETCTRL2_VIDRMEN_SHIFT (1) | ||
152 | #define CDETCTRL2_DXOVPEN_SHIFT (3) | ||
153 | #define CDETCTRL2_VIDRMEN_MASK (0x1 << CDETCTRL2_VIDRMEN_SHIFT) | ||
154 | #define CDETCTRL2_DXOVPEN_MASK (0x1 << CDETCTRL2_DXOVPEN_SHIFT) | ||
155 | |||
156 | /* MAX77693 MUIC - CONTROL1~3 register */ | ||
157 | #define COMN1SW_SHIFT (0) | ||
158 | #define COMP2SW_SHIFT (3) | ||
159 | #define COMN1SW_MASK (0x7 << COMN1SW_SHIFT) | ||
160 | #define COMP2SW_MASK (0x7 << COMP2SW_SHIFT) | ||
161 | #define COMP_SW_MASK (COMP2SW_MASK | COMN1SW_MASK) | ||
162 | #define CONTROL1_SW_USB ((1 << COMP2SW_SHIFT) \ | ||
163 | | (1 << COMN1SW_SHIFT)) | ||
164 | #define CONTROL1_SW_AUDIO ((2 << COMP2SW_SHIFT) \ | ||
165 | | (2 << COMN1SW_SHIFT)) | ||
166 | #define CONTROL1_SW_UART ((3 << COMP2SW_SHIFT) \ | ||
167 | | (3 << COMN1SW_SHIFT)) | ||
168 | #define CONTROL1_SW_OPEN ((0 << COMP2SW_SHIFT) \ | ||
169 | | (0 << COMN1SW_SHIFT)) | ||
170 | |||
171 | #define CONTROL2_LOWPWR_SHIFT (0) | ||
172 | #define CONTROL2_ADCEN_SHIFT (1) | ||
173 | #define CONTROL2_CPEN_SHIFT (2) | ||
174 | #define CONTROL2_SFOUTASRT_SHIFT (3) | ||
175 | #define CONTROL2_SFOUTORD_SHIFT (4) | ||
176 | #define CONTROL2_ACCDET_SHIFT (5) | ||
177 | #define CONTROL2_USBCPINT_SHIFT (6) | ||
178 | #define CONTROL2_RCPS_SHIFT (7) | ||
179 | #define CONTROL2_LOWPWR_MASK (0x1 << CONTROL2_LOWPWR_SHIFT) | ||
180 | #define CONTROL2_ADCEN_MASK (0x1 << CONTROL2_ADCEN_SHIFT) | ||
181 | #define CONTROL2_CPEN_MASK (0x1 << CONTROL2_CPEN_SHIFT) | ||
182 | #define CONTROL2_SFOUTASRT_MASK (0x1 << CONTROL2_SFOUTASRT_SHIFT) | ||
183 | #define CONTROL2_SFOUTORD_MASK (0x1 << CONTROL2_SFOUTORD_SHIFT) | ||
184 | #define CONTROL2_ACCDET_MASK (0x1 << CONTROL2_ACCDET_SHIFT) | ||
185 | #define CONTROL2_USBCPINT_MASK (0x1 << CONTROL2_USBCPINT_SHIFT) | ||
186 | #define CONTROL2_RCPS_MASK (0x1 << CONTROL2_RCPS_SHIFT) | ||
187 | |||
188 | #define CONTROL3_JIGSET_SHIFT (0) | ||
189 | #define CONTROL3_BTLDSET_SHIFT (2) | ||
190 | #define CONTROL3_ADCDBSET_SHIFT (4) | ||
191 | #define CONTROL3_JIGSET_MASK (0x3 << CONTROL3_JIGSET_SHIFT) | ||
192 | #define CONTROL3_BTLDSET_MASK (0x3 << CONTROL3_BTLDSET_SHIFT) | ||
193 | #define CONTROL3_ADCDBSET_MASK (0x3 << CONTROL3_ADCDBSET_SHIFT) | ||
194 | |||
109 | /* Slave addr = 0x90: Haptic */ | 195 | /* Slave addr = 0x90: Haptic */ |
110 | enum max77693_haptic_reg { | 196 | enum max77693_haptic_reg { |
111 | MAX77693_HAPTIC_REG_STATUS = 0x00, | 197 | MAX77693_HAPTIC_REG_STATUS = 0x00, |