aboutsummaryrefslogtreecommitdiffstats
path: root/include/linux/mfd/asic3.h
diff options
context:
space:
mode:
authorSamuel Ortiz <sameo@openedhand.com>2008-06-20 05:02:19 -0400
committerSamuel Ortiz <samuel@sortiz.org>2008-07-20 13:52:38 -0400
commit6f2384c4bdd4be3dc1e5d22ed5e6f0c3076fda60 (patch)
tree2b2db76100b1e7420a661ca1491b67e7b5de79b0 /include/linux/mfd/asic3.h
parent5b664cb235e97afbf34db9c4d77f08ebd725335e (diff)
mfd: asic3 gpiolib support
ASIC3 is, among other things, a GPIO extender. We should thus have it supporting the current gpiolib API. Signed-off-by: Samuel Ortiz <sameo@openedhand.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Diffstat (limited to 'include/linux/mfd/asic3.h')
-rw-r--r--include/linux/mfd/asic3.h24
1 files changed, 11 insertions, 13 deletions
diff --git a/include/linux/mfd/asic3.h b/include/linux/mfd/asic3.h
index 4ab2162db13b..06ef8165f406 100644
--- a/include/linux/mfd/asic3.h
+++ b/include/linux/mfd/asic3.h
@@ -16,16 +16,6 @@
16 16
17#include <linux/types.h> 17#include <linux/types.h>
18 18
19struct asic3 {
20 void __iomem *mapping;
21 unsigned int bus_shift;
22 unsigned int irq_nr;
23 unsigned int irq_base;
24 spinlock_t lock;
25 u16 irq_bothedge[4];
26 struct device *dev;
27};
28
29struct asic3_platform_data { 19struct asic3_platform_data {
30 struct { 20 struct {
31 u32 dir; 21 u32 dir;
@@ -41,18 +31,19 @@ struct asic3_platform_data {
41 31
42 unsigned int irq_base; 32 unsigned int irq_base;
43 33
34 unsigned int gpio_base;
35
44 struct platform_device **children; 36 struct platform_device **children;
45 unsigned int n_children; 37 unsigned int n_children;
46}; 38};
47 39
48int asic3_gpio_get_value(struct asic3 *asic, unsigned gpio);
49void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
50
51#define ASIC3_NUM_GPIO_BANKS 4 40#define ASIC3_NUM_GPIO_BANKS 4
52#define ASIC3_GPIOS_PER_BANK 16 41#define ASIC3_GPIOS_PER_BANK 16
53#define ASIC3_NUM_GPIOS 64 42#define ASIC3_NUM_GPIOS 64
54#define ASIC3_NR_IRQS ASIC3_NUM_GPIOS + 6 43#define ASIC3_NR_IRQS ASIC3_NUM_GPIOS + 6
55 44
45#define ASIC3_TO_GPIO(gpio) (NR_BUILTIN_GPIO + (gpio))
46
56#define ASIC3_GPIO_BANK_A 0 47#define ASIC3_GPIO_BANK_A 0
57#define ASIC3_GPIO_BANK_B 1 48#define ASIC3_GPIO_BANK_B 1
58#define ASIC3_GPIO_BANK_C 2 49#define ASIC3_GPIO_BANK_C 2
@@ -73,6 +64,13 @@ void asic3_gpio_set_value(struct asic3 *asic, unsigned gpio, int val);
73#define ASIC3_GPIO_C_Base 0x0200 64#define ASIC3_GPIO_C_Base 0x0200
74#define ASIC3_GPIO_D_Base 0x0300 65#define ASIC3_GPIO_D_Base 0x0300
75 66
67#define ASIC3_GPIO_TO_BANK(gpio) ((gpio) >> 4)
68#define ASIC3_GPIO_TO_BIT(gpio) ((gpio) - \
69 (ASIC3_GPIOS_PER_BANK * ((gpio) >> 4)))
70#define ASIC3_GPIO_TO_MASK(gpio) (1 << ASIC3_GPIO_TO_BIT(gpio))
71#define ASIC3_GPIO_TO_BASE(gpio) (ASIC3_GPIO_A_Base + (((gpio) >> 4) * 0x0100))
72#define ASIC3_BANK_TO_BASE(bank) (ASIC3_GPIO_A_Base + ((bank) * 0x100))
73
76#define ASIC3_GPIO_Mask 0x00 /* R/W 0:don't mask */ 74#define ASIC3_GPIO_Mask 0x00 /* R/W 0:don't mask */
77#define ASIC3_GPIO_Direction 0x04 /* R/W 0:input */ 75#define ASIC3_GPIO_Direction 0x04 /* R/W 0:input */
78#define ASIC3_GPIO_Out 0x08 /* R/W 0:output low */ 76#define ASIC3_GPIO_Out 0x08 /* R/W 0:output low */