Merge branch 'dmaengine' into async-tx-next

Conflicts:
	crypto/async_tx/async_xor.c
	drivers/dma/ioat/dma_v2.h
	drivers/dma/ioat/pci.c
	drivers/md/raid5.c

1 files changed, 39 insertions, 0 deletions

diff --git a/include/linux/lis3lv02d.h b/include/linux/lis3lv02d.h
new file mode 100644
index 000000000000..ad651f4e45ac
--- /dev/null
+++ b/include/linux/lis3lv02d.h
@@ -0,0 +1,39 @@
+#ifndef __LIS3LV02D_H_
+#define __LIS3LV02D_H_
+
+struct lis3lv02d_platform_data {
+        /* please note: the 'click' feature is only supported for
+         * LIS[32]02DL variants of the chip and will be ignored for
+         * others */
+#define LIS3_CLICK_SINGLE_X     (1 << 0)
+#define LIS3_CLICK_DOUBLE_X     (1 << 1)
+#define LIS3_CLICK_SINGLE_Y     (1 << 2)
+#define LIS3_CLICK_DOUBLE_Y     (1 << 3)
+#define LIS3_CLICK_SINGLE_Z     (1 << 4)
+#define LIS3_CLICK_DOUBLE_Z     (1 << 5)
+        unsigned char click_flags;
+        unsigned char click_thresh_x;
+        unsigned char click_thresh_y;
+        unsigned char click_thresh_z;
+        unsigned char click_time_limit;
+        unsigned char click_latency;
+        unsigned char click_window;
+
+#define LIS3_IRQ1_DISABLE       (0 << 0)
+#define LIS3_IRQ1_FF_WU_1       (1 << 0)
+#define LIS3_IRQ1_FF_WU_2       (2 << 0)
+#define LIS3_IRQ1_FF_WU_12      (3 << 0)
+#define LIS3_IRQ1_DATA_READY    (4 << 0)
+#define LIS3_IRQ1_CLICK         (7 << 0)
+#define LIS3_IRQ2_DISABLE       (0 << 3)
+#define LIS3_IRQ2_FF_WU_1       (1 << 3)
+#define LIS3_IRQ2_FF_WU_2       (2 << 3)
+#define LIS3_IRQ2_FF_WU_12      (3 << 3)
+#define LIS3_IRQ2_DATA_READY    (4 << 3)
+#define LIS3_IRQ2_CLICK         (7 << 3)
+#define LIS3_IRQ_OPEN_DRAIN     (1 << 6)
+#define LIS3_IRQ_ACTIVE_HIGH    (1 << 7)
+        unsigned char irq_cfg;
+};
+
+#endif /* __LIS3LV02D_H_ */