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authorTejun Heo <htejun@gmail.com>2006-05-15 07:59:15 -0400
committerTejun Heo <htejun@gmail.com>2006-05-15 07:59:15 -0400
commit12436c30f4808e00fa008c6787c609bc6ae216ba (patch)
tree22ddaad8def4f4a77637a3da62a8d8f422a95c29 /include/linux/libata.h
parent88ce7550c38f46c8697f53727a571bf838bee398 (diff)
parent7894eaf291238a62a565e9e9777483beeb00eeae (diff)
Merge branch 'irq-pio'
Conflicts: drivers/scsi/libata-core.c include/linux/libata.h
Diffstat (limited to 'include/linux/libata.h')
-rw-r--r--include/linux/libata.h24
1 files changed, 10 insertions, 14 deletions
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 6ccacbf889e3..db17723e23fb 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -124,6 +124,7 @@ enum {
124 /* struct ata_device stuff */ 124 /* struct ata_device stuff */
125 ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */ 125 ATA_DFLAG_LBA = (1 << 0), /* device supports LBA */
126 ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */ 126 ATA_DFLAG_LBA48 = (1 << 1), /* device supports LBA48 */
127 ATA_DFLAG_CDB_INTR = (1 << 2), /* device asserts INTRQ when ready for CDB */
127 ATA_DFLAG_CFG_MASK = (1 << 8) - 1, 128 ATA_DFLAG_CFG_MASK = (1 << 8) - 1,
128 129
129 ATA_DFLAG_PIO = (1 << 8), /* device currently in PIO mode */ 130 ATA_DFLAG_PIO = (1 << 8), /* device currently in PIO mode */
@@ -147,9 +148,9 @@ enum {
147 ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */ 148 ATA_FLAG_PIO_DMA = (1 << 7), /* PIO cmds via DMA */
148 ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */ 149 ATA_FLAG_PIO_LBA48 = (1 << 8), /* Host DMA engine is LBA28 only */
149 ATA_FLAG_IRQ_MASK = (1 << 9), /* Mask IRQ in PIO xfers */ 150 ATA_FLAG_IRQ_MASK = (1 << 9), /* Mask IRQ in PIO xfers */
151 ATA_FLAG_PIO_POLLING = (1 << 10), /* use polling PIO if LLD
152 * doesn't handle PIO interrupts */
150 153
151 ATA_FLAG_NOINTR = (1 << 13), /* FIXME: Remove this once
152 * proper HSM is in place. */
153 ATA_FLAG_DEBUGMSG = (1 << 14), 154 ATA_FLAG_DEBUGMSG = (1 << 14),
154 ATA_FLAG_FLUSH_PORT_TASK = (1 << 15), /* flush port task */ 155 ATA_FLAG_FLUSH_PORT_TASK = (1 << 15), /* flush port task */
155 156
@@ -178,11 +179,8 @@ enum {
178 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host_set only */ 179 ATA_HOST_SIMPLEX = (1 << 0), /* Host is simplex, one DMA channel per host_set only */
179 180
180 /* various lengths of time */ 181 /* various lengths of time */
181 ATA_TMOUT_PIO = 30 * HZ,
182 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */ 182 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */
183 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */ 183 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */
184 ATA_TMOUT_CDB = 30 * HZ,
185 ATA_TMOUT_CDB_QUICK = 5 * HZ,
186 ATA_TMOUT_INTERNAL = 30 * HZ, 184 ATA_TMOUT_INTERNAL = 30 * HZ,
187 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ, 185 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ,
188 186
@@ -252,14 +250,13 @@ enum {
252}; 250};
253 251
254enum hsm_task_states { 252enum hsm_task_states {
255 HSM_ST_UNKNOWN, 253 HSM_ST_UNKNOWN, /* state unknown */
256 HSM_ST_IDLE, 254 HSM_ST_IDLE, /* no command on going */
257 HSM_ST_POLL, 255 HSM_ST, /* (waiting the device to) transfer data */
258 HSM_ST_TMOUT, 256 HSM_ST_LAST, /* (waiting the device to) complete command */
259 HSM_ST, 257 HSM_ST_ERR, /* error */
260 HSM_ST_LAST, 258 HSM_ST_FIRST, /* (waiting the device to)
261 HSM_ST_LAST_POLL, 259 write CDB or first data block */
262 HSM_ST_ERR,
263}; 260};
264 261
265enum ata_completion_errors { 262enum ata_completion_errors {
@@ -485,7 +482,6 @@ struct ata_port {
485 struct work_struct port_task; 482 struct work_struct port_task;
486 483
487 unsigned int hsm_task_state; 484 unsigned int hsm_task_state;
488 unsigned long pio_task_timeout;
489 485
490 u32 msg_enable; 486 u32 msg_enable;
491 struct list_head eh_done_q; 487 struct list_head eh_done_q;