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authorMarc Zyngier <marc.zyngier@arm.com>2014-11-24 09:35:11 -0500
committerJason Cooper <jason@lakedaemon.net>2014-11-26 10:55:12 -0500
commitcc2d3216f53c9fff0030eb71cacc4ce5f39d1d7e (patch)
tree5ee3d58aab214a297e5dc906caf08211cef3d21d /include/linux/irqchip
parentf5c1434c217fd72ac0d24d3142d09e49a3d4e72e (diff)
irqchip: GICv3: ITS command queue
The ITS is configured through a number commands that the driver issues to the HW using a memory-based circular buffer. This patch implements the subset of commands that are required for Linux. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1416839720-18400-5-git-send-email-marc.zyngier@arm.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'include/linux/irqchip')
-rw-r--r--include/linux/irqchip/arm-gic-v3.h102
1 files changed, 102 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index 040615a48bf5..21c9d70426d1 100644
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -80,9 +80,27 @@
80#define GICR_MOVALLR 0x0110 80#define GICR_MOVALLR 0x0110
81#define GICR_PIDR2 GICD_PIDR2 81#define GICR_PIDR2 GICD_PIDR2
82 82
83#define GICR_CTLR_ENABLE_LPIS (1UL << 0)
84
85#define GICR_TYPER_CPU_NUMBER(r) (((r) >> 8) & 0xffff)
86
83#define GICR_WAKER_ProcessorSleep (1U << 1) 87#define GICR_WAKER_ProcessorSleep (1U << 1)
84#define GICR_WAKER_ChildrenAsleep (1U << 2) 88#define GICR_WAKER_ChildrenAsleep (1U << 2)
85 89
90#define GICR_PROPBASER_NonShareable (0U << 10)
91#define GICR_PROPBASER_InnerShareable (1U << 10)
92#define GICR_PROPBASER_OuterShareable (2U << 10)
93#define GICR_PROPBASER_SHAREABILITY_MASK (3UL << 10)
94#define GICR_PROPBASER_nCnB (0U << 7)
95#define GICR_PROPBASER_nC (1U << 7)
96#define GICR_PROPBASER_RaWt (2U << 7)
97#define GICR_PROPBASER_RaWb (3U << 7)
98#define GICR_PROPBASER_WaWt (4U << 7)
99#define GICR_PROPBASER_WaWb (5U << 7)
100#define GICR_PROPBASER_RaWaWt (6U << 7)
101#define GICR_PROPBASER_RaWaWb (7U << 7)
102#define GICR_PROPBASER_IDBITS_MASK (0x1f)
103
86/* 104/*
87 * Re-Distributor registers, offsets from SGI_base 105 * Re-Distributor registers, offsets from SGI_base
88 */ 106 */
@@ -95,9 +113,93 @@
95#define GICR_IPRIORITYR0 GICD_IPRIORITYR 113#define GICR_IPRIORITYR0 GICD_IPRIORITYR
96#define GICR_ICFGR0 GICD_ICFGR 114#define GICR_ICFGR0 GICD_ICFGR
97 115
116#define GICR_TYPER_PLPIS (1U << 0)
98#define GICR_TYPER_VLPIS (1U << 1) 117#define GICR_TYPER_VLPIS (1U << 1)
99#define GICR_TYPER_LAST (1U << 4) 118#define GICR_TYPER_LAST (1U << 4)
100 119
120#define LPI_PROP_GROUP1 (1 << 1)
121#define LPI_PROP_ENABLED (1 << 0)
122
123/*
124 * ITS registers, offsets from ITS_base
125 */
126#define GITS_CTLR 0x0000
127#define GITS_IIDR 0x0004
128#define GITS_TYPER 0x0008
129#define GITS_CBASER 0x0080
130#define GITS_CWRITER 0x0088
131#define GITS_CREADR 0x0090
132#define GITS_BASER 0x0100
133#define GITS_PIDR2 GICR_PIDR2
134
135#define GITS_TRANSLATER 0x10040
136
137#define GITS_TYPER_PTA (1UL << 19)
138
139#define GITS_CBASER_VALID (1UL << 63)
140#define GITS_CBASER_nCnB (0UL << 59)
141#define GITS_CBASER_nC (1UL << 59)
142#define GITS_CBASER_RaWt (2UL << 59)
143#define GITS_CBASER_RaWb (3UL << 59)
144#define GITS_CBASER_WaWt (4UL << 59)
145#define GITS_CBASER_WaWb (5UL << 59)
146#define GITS_CBASER_RaWaWt (6UL << 59)
147#define GITS_CBASER_RaWaWb (7UL << 59)
148#define GITS_CBASER_NonShareable (0UL << 10)
149#define GITS_CBASER_InnerShareable (1UL << 10)
150#define GITS_CBASER_OuterShareable (2UL << 10)
151#define GITS_CBASER_SHAREABILITY_MASK (3UL << 10)
152
153#define GITS_BASER_NR_REGS 8
154
155#define GITS_BASER_VALID (1UL << 63)
156#define GITS_BASER_nCnB (0UL << 59)
157#define GITS_BASER_nC (1UL << 59)
158#define GITS_BASER_RaWt (2UL << 59)
159#define GITS_BASER_RaWb (3UL << 59)
160#define GITS_BASER_WaWt (4UL << 59)
161#define GITS_BASER_WaWb (5UL << 59)
162#define GITS_BASER_RaWaWt (6UL << 59)
163#define GITS_BASER_RaWaWb (7UL << 59)
164#define GITS_BASER_TYPE_SHIFT (56)
165#define GITS_BASER_TYPE(r) (((r) >> GITS_BASER_TYPE_SHIFT) & 7)
166#define GITS_BASER_ENTRY_SIZE_SHIFT (48)
167#define GITS_BASER_ENTRY_SIZE(r) ((((r) >> GITS_BASER_ENTRY_SIZE_SHIFT) & 0xff) + 1)
168#define GITS_BASER_NonShareable (0UL << 10)
169#define GITS_BASER_InnerShareable (1UL << 10)
170#define GITS_BASER_OuterShareable (2UL << 10)
171#define GITS_BASER_SHAREABILITY_SHIFT (10)
172#define GITS_BASER_SHAREABILITY_MASK (3UL << GITS_BASER_SHAREABILITY_SHIFT)
173#define GITS_BASER_PAGE_SIZE_SHIFT (8)
174#define GITS_BASER_PAGE_SIZE_4K (0UL << GITS_BASER_PAGE_SIZE_SHIFT)
175#define GITS_BASER_PAGE_SIZE_16K (1UL << GITS_BASER_PAGE_SIZE_SHIFT)
176#define GITS_BASER_PAGE_SIZE_64K (2UL << GITS_BASER_PAGE_SIZE_SHIFT)
177#define GITS_BASER_PAGE_SIZE_MASK (3UL << GITS_BASER_PAGE_SIZE_SHIFT)
178
179#define GITS_BASER_TYPE_NONE 0
180#define GITS_BASER_TYPE_DEVICE 1
181#define GITS_BASER_TYPE_VCPU 2
182#define GITS_BASER_TYPE_CPU 3
183#define GITS_BASER_TYPE_COLLECTION 4
184#define GITS_BASER_TYPE_RESERVED5 5
185#define GITS_BASER_TYPE_RESERVED6 6
186#define GITS_BASER_TYPE_RESERVED7 7
187
188/*
189 * ITS commands
190 */
191#define GITS_CMD_MAPD 0x08
192#define GITS_CMD_MAPC 0x09
193#define GITS_CMD_MAPVI 0x0a
194#define GITS_CMD_MOVI 0x01
195#define GITS_CMD_DISCARD 0x0f
196#define GITS_CMD_INV 0x0c
197#define GITS_CMD_MOVALL 0x0e
198#define GITS_CMD_INVALL 0x0d
199#define GITS_CMD_INT 0x03
200#define GITS_CMD_CLEAR 0x04
201#define GITS_CMD_SYNC 0x05
202
101/* 203/*
102 * CPU interface registers 204 * CPU interface registers
103 */ 205 */