diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/linux/ibmtr.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'include/linux/ibmtr.h')
-rw-r--r-- | include/linux/ibmtr.h | 373 |
1 files changed, 373 insertions, 0 deletions
diff --git a/include/linux/ibmtr.h b/include/linux/ibmtr.h new file mode 100644 index 000000000000..2ef0b21517fb --- /dev/null +++ b/include/linux/ibmtr.h | |||
@@ -0,0 +1,373 @@ | |||
1 | #ifndef __LINUX_IBMTR_H__ | ||
2 | #define __LINUX_IBMTR_H__ | ||
3 | |||
4 | /* Definitions for an IBM Token Ring card. */ | ||
5 | /* This file is distributed under the GNU GPL */ | ||
6 | |||
7 | /* ported to the Alpha architecture 02/20/96 (just used the HZ macro) */ | ||
8 | |||
9 | #define TR_RETRY_INTERVAL (30*HZ) /* 500 on PC = 5 s */ | ||
10 | #define TR_RST_TIME (HZ/20) /* 5 on PC = 50 ms */ | ||
11 | #define TR_BUSY_INTERVAL (HZ/5) /* 5 on PC = 200 ms */ | ||
12 | #define TR_SPIN_INTERVAL (3*HZ) /* 3 seconds before init timeout */ | ||
13 | |||
14 | #define TR_ISA 1 | ||
15 | #define TR_MCA 2 | ||
16 | #define TR_ISAPNP 3 | ||
17 | #define NOTOK 0 | ||
18 | |||
19 | #define IBMTR_SHARED_RAM_SIZE 0x10000 | ||
20 | #define IBMTR_IO_EXTENT 4 | ||
21 | #define IBMTR_MAX_ADAPTERS 4 | ||
22 | |||
23 | #define CHANNEL_ID 0X1F30 | ||
24 | #define AIP 0X1F00 | ||
25 | #define AIPADAPTYPE 0X1FA0 | ||
26 | #define AIPDATARATE 0X1FA2 | ||
27 | #define AIPEARLYTOKEN 0X1FA4 | ||
28 | #define AIPAVAILSHRAM 0X1FA6 | ||
29 | #define AIPSHRAMPAGE 0X1FA8 | ||
30 | #define AIP4MBDHB 0X1FAA | ||
31 | #define AIP16MBDHB 0X1FAC | ||
32 | #define AIPFID 0X1FBA | ||
33 | |||
34 | #define ADAPTRESET 0x1 /* Control Adapter reset (add to base) */ | ||
35 | #define ADAPTRESETREL 0x2 /* Release Adapter from reset ( """) */ | ||
36 | #define ADAPTINTREL 0x3 /* Adapter interrupt release */ | ||
37 | |||
38 | #define GLOBAL_INT_ENABLE 0x02f0 | ||
39 | |||
40 | /* MMIO bits 0-4 select register */ | ||
41 | #define RRR_EVEN 0x00 /* Shared RAM relocation registers - even and odd */ | ||
42 | /* Used to set the starting address of shared RAM */ | ||
43 | /* Bits 1 through 7 of this register map to bits 13 through 19 of the shared | ||
44 | RAM address.*/ | ||
45 | /* ie: 0x02 sets RAM address to ...ato! issy su wazzoo !! GODZILLA!!! */ | ||
46 | #define RRR_ODD 0x01 | ||
47 | /* Bits 2 and 3 of this register can be read to determine shared RAM size */ | ||
48 | /* 00 for 8k, 01 for 16k, 10 for 32k, 11 for 64k */ | ||
49 | #define WRBR_EVEN 0x02 /* Write region base registers - even and odd */ | ||
50 | #define WRBR_ODD 0x03 | ||
51 | #define WWOR_EVEN 0x04 /* Write window open registers - even and odd */ | ||
52 | #define WWOR_ODD 0x05 | ||
53 | #define WWCR_EVEN 0x06 /* Write window close registers - even and odd */ | ||
54 | #define WWCR_ODD 0x07 | ||
55 | |||
56 | /* Interrupt status registers - PC system - even and odd */ | ||
57 | #define ISRP_EVEN 0x08 | ||
58 | |||
59 | #define TCR_INT 0x10 /* Bit 4 - Timer interrupt. The TVR_EVEN timer has | ||
60 | expired. */ | ||
61 | #define ERR_INT 0x08 /* Bit 3 - Error interrupt. The adapter has had an | ||
62 | internal error. */ | ||
63 | #define ACCESS_INT 0x04 /* Bit 2 - Access interrupt. You have attempted to | ||
64 | write to an invalid area of shared RAM | ||
65 | or an invalid register within the MMIO. */ | ||
66 | /* In addition, the following bits within ISRP_EVEN can be turned on or off */ | ||
67 | /* by you to control the interrupt processing: */ | ||
68 | #define INT_ENABLE 0x40 /* Bit 6 - Interrupt enable. If 0, no interrupts will | ||
69 | occur. If 1, interrupts will occur normally. | ||
70 | Normally set to 1. */ | ||
71 | /* Bit 0 - Primary or alternate adapter. Set to zero if this adapter is the | ||
72 | primary adapter, 1 if this adapter is the alternate adapter. */ | ||
73 | |||
74 | |||
75 | #define ISRP_ODD 0x09 | ||
76 | |||
77 | #define ADAP_CHK_INT 0x40 /* Bit 6 - Adapter check. the adapter has | ||
78 | encountered a serious problem and has closed | ||
79 | itself. Whoa. */ | ||
80 | #define SRB_RESP_INT 0x20 /* Bit 5 - SRB response. The adapter has accepted | ||
81 | an SRB request and set the return code within | ||
82 | the SRB. */ | ||
83 | #define ASB_FREE_INT 0x10 /* Bit 4 - ASB free. The adapter has read the ASB | ||
84 | and this area can be safely reused. This interrupt | ||
85 | is only used if your application has set the ASB | ||
86 | free request bit in ISRA_ODD or if an error was | ||
87 | detected in your response. */ | ||
88 | #define ARB_CMD_INT 0x08 /* Bit 3 - ARB command. The adapter has given you a | ||
89 | command for action. The command is located in the | ||
90 | ARB area of shared memory. */ | ||
91 | #define SSB_RESP_INT 0x04 /* Bit 2 - SSB response. The adapter has posted a | ||
92 | response to your SRB (the response is located in | ||
93 | the SSB area of shared memory). */ | ||
94 | /* Bit 1 - Bridge frame forward complete. */ | ||
95 | |||
96 | |||
97 | |||
98 | #define ISRA_EVEN 0x0A /*Interrupt status registers - adapter - even and odd */ | ||
99 | /* Bit 7 - Internal parity error (on adapter's internal bus) */ | ||
100 | /* Bit 6 - Timer interrupt pending */ | ||
101 | /* Bit 5 - Access interrupt (attempt by adapter to access illegal address) */ | ||
102 | /* Bit 4 - Adapter microcode problem (microcode dead-man timer expired) */ | ||
103 | /* Bit 3 - Adapter processor check status */ | ||
104 | /* Bit 2 - Reserved */ | ||
105 | /* Bit 1 - Adapter hardware interrupt mask (prevents internal interrupts) */ | ||
106 | /* Bit 0 - Adapter software interrupt mask (prevents internal software ints) */ | ||
107 | |||
108 | #define ISRA_ODD 0x0B | ||
109 | #define CMD_IN_SRB 0x20 /* Bit 5 - Indicates that you have placed a new | ||
110 | command in the SRB and are ready for the adapter to | ||
111 | process the command. */ | ||
112 | #define RESP_IN_ASB 0x10 /* Bit 4 - Indicates that you have placed a response | ||
113 | (an ASB) in the shared RAM which is available for | ||
114 | the adapter's use. */ | ||
115 | /* Bit 3 - Indicates that you are ready to put an SRB in the shared RAM, but | ||
116 | that a previous command is still pending. The adapter will then | ||
117 | interrupt you when the previous command is completed */ | ||
118 | /* Bit 2 - Indicates that you are ready to put an ASB in the shared RAM, but | ||
119 | that a previous ASB is still pending. The adapter will then interrupt | ||
120 | you when the previous ASB is copied. */ | ||
121 | #define ARB_FREE 0x2 | ||
122 | #define SSB_FREE 0x1 | ||
123 | |||
124 | #define TCR_EVEN 0x0C /* Timer control registers - even and odd */ | ||
125 | #define TCR_ODD 0x0D | ||
126 | #define TVR_EVEN 0x0E /* Timer value registers - even and odd */ | ||
127 | #define TVR_ODD 0x0F | ||
128 | #define SRPR_EVEN 0x18 /* Shared RAM paging registers - even and odd */ | ||
129 | #define SRPR_ENABLE_PAGING 0xc0 | ||
130 | #define SRPR_ODD 0x19 /* Not used. */ | ||
131 | #define TOKREAD 0x60 | ||
132 | #define TOKOR 0x40 | ||
133 | #define TOKAND 0x20 | ||
134 | #define TOKWRITE 0x00 | ||
135 | |||
136 | /* MMIO bits 5-6 select operation */ | ||
137 | /* 00 is used to write to a register */ | ||
138 | /* 01 is used to bitwise AND a byte with a register */ | ||
139 | /* 10 is used to bitwise OR a byte with a register */ | ||
140 | /* 11 is used to read from a register */ | ||
141 | |||
142 | /* MMIO bits 7-8 select area of interest.. see below */ | ||
143 | /* 00 selects attachment control area. */ | ||
144 | /* 01 is reserved. */ | ||
145 | /* 10 selects adapter identification area A containing the adapter encoded | ||
146 | address. */ | ||
147 | /* 11 selects the adapter identification area B containing test patterns. */ | ||
148 | |||
149 | #define PCCHANNELID 5049434F3631313039393020 | ||
150 | #define MCCHANNELID 4D4152533633583435313820 | ||
151 | |||
152 | #define ACA_OFFSET 0x1e00 | ||
153 | #define ACA_SET 0x40 | ||
154 | #define ACA_RESET 0x20 | ||
155 | #define ACA_RW 0x00 | ||
156 | |||
157 | #ifdef ENABLE_PAGING | ||
158 | #define SET_PAGE(x) (writeb((x), ti->mmio + ACA_OFFSET+ ACA_RW + SRPR_EVEN)) | ||
159 | #else | ||
160 | #define SET_PAGE(x) | ||
161 | #endif | ||
162 | |||
163 | /* do_tok_int possible values */ | ||
164 | #define FIRST_INT 1 | ||
165 | #define NOT_FIRST 2 | ||
166 | |||
167 | typedef enum { CLOSED, OPEN } open_state; | ||
168 | //staic const char *printstate[] = { "CLOSED","OPEN"}; | ||
169 | |||
170 | struct tok_info { | ||
171 | unsigned char irq; | ||
172 | void __iomem *mmio; | ||
173 | unsigned char hw_address[32]; | ||
174 | unsigned char adapter_type; | ||
175 | unsigned char data_rate; | ||
176 | unsigned char token_release; | ||
177 | unsigned char avail_shared_ram; | ||
178 | unsigned char shared_ram_paging; | ||
179 | unsigned char turbo; | ||
180 | unsigned short dhb_size4mb; | ||
181 | unsigned short rbuf_len4; | ||
182 | unsigned short rbuf_cnt4; | ||
183 | unsigned short maxmtu4; | ||
184 | unsigned short dhb_size16mb; | ||
185 | unsigned short rbuf_len16; | ||
186 | unsigned short rbuf_cnt16; | ||
187 | unsigned short maxmtu16; | ||
188 | /* Additions by David Morris */ | ||
189 | unsigned char do_tok_int; | ||
190 | wait_queue_head_t wait_for_reset; | ||
191 | unsigned char sram_base; | ||
192 | /* Additions by Peter De Schrijver */ | ||
193 | unsigned char page_mask; /* mask to select RAM page to Map*/ | ||
194 | unsigned char mapped_ram_size; /* size of RAM page */ | ||
195 | __u32 sram_phys; /* Shared memory base address */ | ||
196 | void __iomem *sram_virt; /* Shared memory base address */ | ||
197 | void __iomem *init_srb; /* Initial System Request Block address */ | ||
198 | void __iomem *srb; /* System Request Block address */ | ||
199 | void __iomem *ssb; /* System Status Block address */ | ||
200 | void __iomem *arb; /* Adapter Request Block address */ | ||
201 | void __iomem *asb; /* Adapter Status Block address */ | ||
202 | __u8 init_srb_page; | ||
203 | __u8 srb_page; | ||
204 | __u8 ssb_page; | ||
205 | __u8 arb_page; | ||
206 | __u8 asb_page; | ||
207 | unsigned short exsap_station_id; | ||
208 | unsigned short global_int_enable; | ||
209 | struct sk_buff *current_skb; | ||
210 | struct net_device_stats tr_stats; | ||
211 | unsigned char auto_speedsave; | ||
212 | open_state open_status, sap_status; | ||
213 | enum {MANUAL, AUTOMATIC} open_mode; | ||
214 | enum {FAIL, RESTART, REOPEN} open_action; | ||
215 | enum {NO, YES} open_failure; | ||
216 | unsigned char readlog_pending; | ||
217 | unsigned short adapter_int_enable; /* Adapter-specific int enable */ | ||
218 | struct timer_list tr_timer; | ||
219 | unsigned char ring_speed; | ||
220 | spinlock_t lock; /* SMP protection */ | ||
221 | }; | ||
222 | |||
223 | /* token ring adapter commands */ | ||
224 | #define DIR_INTERRUPT 0x00 /* struct srb_interrupt */ | ||
225 | #define DIR_MOD_OPEN_PARAMS 0x01 | ||
226 | #define DIR_OPEN_ADAPTER 0x03 /* struct dir_open_adapter */ | ||
227 | #define DIR_CLOSE_ADAPTER 0x04 | ||
228 | #define DIR_SET_GRP_ADDR 0x06 | ||
229 | #define DIR_SET_FUNC_ADDR 0x07 /* struct srb_set_funct_addr */ | ||
230 | #define DIR_READ_LOG 0x08 /* struct srb_read_log */ | ||
231 | #define DLC_OPEN_SAP 0x15 /* struct dlc_open_sap */ | ||
232 | #define DLC_CLOSE_SAP 0x16 | ||
233 | #define DATA_LOST 0x20 /* struct asb_rec */ | ||
234 | #define REC_DATA 0x81 /* struct arb_rec_req */ | ||
235 | #define XMIT_DATA_REQ 0x82 /* struct arb_xmit_req */ | ||
236 | #define DLC_STATUS 0x83 /* struct arb_dlc_status */ | ||
237 | #define RING_STAT_CHANGE 0x84 /* struct dlc_open_sap ??? */ | ||
238 | |||
239 | /* DIR_OPEN_ADAPTER options */ | ||
240 | #define OPEN_PASS_BCON_MAC 0x0100 | ||
241 | #define NUM_RCV_BUF 2 | ||
242 | #define RCV_BUF_LEN 1024 | ||
243 | #define DHB_LENGTH 2048 | ||
244 | #define NUM_DHB 2 | ||
245 | #define DLC_MAX_SAP 2 | ||
246 | #define DLC_MAX_STA 1 | ||
247 | |||
248 | /* DLC_OPEN_SAP options */ | ||
249 | #define MAX_I_FIELD 0x0088 | ||
250 | #define SAP_OPEN_IND_SAP 0x04 | ||
251 | #define SAP_OPEN_PRIORITY 0x20 | ||
252 | #define SAP_OPEN_STATION_CNT 0x1 | ||
253 | #define XMIT_DIR_FRAME 0x0A | ||
254 | #define XMIT_UI_FRAME 0x0d | ||
255 | #define XMIT_XID_CMD 0x0e | ||
256 | #define XMIT_TEST_CMD 0x11 | ||
257 | |||
258 | /* srb close return code */ | ||
259 | #define SIGNAL_LOSS 0x8000 | ||
260 | #define HARD_ERROR 0x4000 | ||
261 | #define XMIT_BEACON 0x1000 | ||
262 | #define LOBE_FAULT 0x0800 | ||
263 | #define AUTO_REMOVAL 0x0400 | ||
264 | #define REMOVE_RECV 0x0100 | ||
265 | #define LOG_OVERFLOW 0x0080 | ||
266 | #define RING_RECOVER 0x0020 | ||
267 | |||
268 | struct srb_init_response { | ||
269 | unsigned char command; | ||
270 | unsigned char init_status; | ||
271 | unsigned char init_status_2; | ||
272 | unsigned char reserved[3]; | ||
273 | __u16 bring_up_code; | ||
274 | __u16 encoded_address; | ||
275 | __u16 level_address; | ||
276 | __u16 adapter_address; | ||
277 | __u16 parms_address; | ||
278 | __u16 mac_address; | ||
279 | }; | ||
280 | |||
281 | struct dir_open_adapter { | ||
282 | unsigned char command; | ||
283 | char reserved[7]; | ||
284 | __u16 open_options; | ||
285 | unsigned char node_address[6]; | ||
286 | unsigned char group_address[4]; | ||
287 | unsigned char funct_address[4]; | ||
288 | __u16 num_rcv_buf; | ||
289 | __u16 rcv_buf_len; | ||
290 | __u16 dhb_length; | ||
291 | unsigned char num_dhb; | ||
292 | char reserved2; | ||
293 | unsigned char dlc_max_sap; | ||
294 | unsigned char dlc_max_sta; | ||
295 | unsigned char dlc_max_gsap; | ||
296 | unsigned char dlc_max_gmem; | ||
297 | unsigned char dlc_t1_tick_1; | ||
298 | unsigned char dlc_t2_tick_1; | ||
299 | unsigned char dlc_ti_tick_1; | ||
300 | unsigned char dlc_t1_tick_2; | ||
301 | unsigned char dlc_t2_tick_2; | ||
302 | unsigned char dlc_ti_tick_2; | ||
303 | unsigned char product_id[18]; | ||
304 | }; | ||
305 | |||
306 | struct dlc_open_sap { | ||
307 | unsigned char command; | ||
308 | unsigned char reserved1; | ||
309 | unsigned char ret_code; | ||
310 | unsigned char reserved2; | ||
311 | __u16 station_id; | ||
312 | unsigned char timer_t1; | ||
313 | unsigned char timer_t2; | ||
314 | unsigned char timer_ti; | ||
315 | unsigned char maxout; | ||
316 | unsigned char maxin; | ||
317 | unsigned char maxout_incr; | ||
318 | unsigned char max_retry_count; | ||
319 | unsigned char gsap_max_mem; | ||
320 | __u16 max_i_field; | ||
321 | unsigned char sap_value; | ||
322 | unsigned char sap_options; | ||
323 | unsigned char station_count; | ||
324 | unsigned char sap_gsap_mem; | ||
325 | unsigned char gsap[0]; | ||
326 | }; | ||
327 | |||
328 | struct srb_xmit { | ||
329 | unsigned char command; | ||
330 | unsigned char cmd_corr; | ||
331 | unsigned char ret_code; | ||
332 | unsigned char reserved1; | ||
333 | __u16 station_id; | ||
334 | }; | ||
335 | |||
336 | struct arb_rec_req { | ||
337 | unsigned char command; | ||
338 | unsigned char reserved1[3]; | ||
339 | __u16 station_id; | ||
340 | __u16 rec_buf_addr; | ||
341 | unsigned char lan_hdr_len; | ||
342 | unsigned char dlc_hdr_len; | ||
343 | __u16 frame_len; | ||
344 | unsigned char msg_type; | ||
345 | }; | ||
346 | |||
347 | struct asb_rec { | ||
348 | unsigned char command; | ||
349 | unsigned char reserved1; | ||
350 | unsigned char ret_code; | ||
351 | unsigned char reserved2; | ||
352 | __u16 station_id; | ||
353 | __u16 rec_buf_addr; | ||
354 | }; | ||
355 | |||
356 | struct rec_buf { | ||
357 | unsigned char reserved1[2]; | ||
358 | __u16 buf_ptr; | ||
359 | unsigned char reserved2; | ||
360 | unsigned char receive_fs; | ||
361 | __u16 buf_len; | ||
362 | unsigned char data[0]; | ||
363 | }; | ||
364 | |||
365 | struct srb_set_funct_addr { | ||
366 | unsigned char command; | ||
367 | unsigned char reserved1; | ||
368 | unsigned char ret_code; | ||
369 | unsigned char reserved2[3]; | ||
370 | unsigned char funct_address[4]; | ||
371 | }; | ||
372 | |||
373 | #endif | ||