gianfar: Convert gianfar to an of_platform_driver

Does the same for the accompanying MDIO driver, and then modifies the TBI
configuration method.  The old way used fields in einfo, which no longer
exists.  The new way is to create an MDIO device-tree node for each instance
of gianfar, and create a tbi-handle property to associate ethernet controllers
with the TBI PHYs they are connected to.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 1 insertions, 17 deletions

diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 708bab58d8d0..d9051d717d27 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -47,12 +47,7 @@
 struct gianfar_platform_data {
         /* device specific information */
         u32     device_flags;
-        /* board specific information */
-        u32     board_flags;
-        int     mdio_bus;                       /* Bus controlled by us */
-        char    bus_id[MII_BUS_ID_SIZE];        /* Bus PHY is on */
-        u32     phy_id;
-        u8      mac_addr[6];
+        char    bus_id[BUS_ID_SIZE];
         phy_interface_t interface;
 };
 
@@ -61,17 +56,6 @@ struct gianfar_mdio_data {
         int     irq[32];
 };
 
-/* Flags related to gianfar device features */
-#define FSL_GIANFAR_DEV_HAS_GIGABIT             0x00000001
-#define FSL_GIANFAR_DEV_HAS_COALESCE            0x00000002
-#define FSL_GIANFAR_DEV_HAS_RMON                0x00000004
-#define FSL_GIANFAR_DEV_HAS_MULTI_INTR          0x00000008
-#define FSL_GIANFAR_DEV_HAS_CSUM                0x00000010
-#define FSL_GIANFAR_DEV_HAS_VLAN                0x00000020
-#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH       0x00000040
-#define FSL_GIANFAR_DEV_HAS_PADDING             0x00000080
-#define FSL_GIANFAR_DEV_HAS_MAGIC_PACKET        0x00000100
-
 /* Flags in gianfar_platform_data */
 #define FSL_GIANFAR_BRD_HAS_PHY_INTR    0x00000001 /* set or use a timer */
 #define FSL_GIANFAR_BRD_IS_REDUCED      0x00000002 /* Set if RGMII, RMII */