edac: move dimm properties to struct dimm_info

On systems based on chip select rows, all channels need to use memories
with the same properties, otherwise the memories on channels A and B
won't be recognized.

However, such assumption is not true for all types of memory
controllers.

Controllers for FB-DIMM's don't have such requirements.

Also, modern Intel controllers seem to be capable of handling such
differences.

So, we need to get rid of storing the DIMM information into a per-csrow
data, storing it, instead at the right place.

The first step is to move grain, mtype, dtype and edac_mode to the
per-dimm struct.

Reviewed-by: Aristeu Rozanski <arozansk@redhat.com>
Reviewed-by: Borislav Petkov <borislav.petkov@amd.com>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Borislav Petkov <borislav.petkov@amd.com>
Cc: Mark Gross <mark.gross@intel.com>
Cc: Jason Uhlenkott <juhlenko@akamai.com>
Cc: Tim Small <tim@buttersideup.com>
Cc: Ranganathan Desikan <ravi@jetztechnologies.com>
Cc: "Arvind R." <arvino55@gmail.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Egor Martovetsky <egor@pasemi.com>
Cc: Michal Marek <mmarek@suse.cz>
Cc: Jiri Kosina <jkosina@suse.cz>
Cc: Joe Perches <joe@perches.com>
Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Hitoshi Mitake <h.mitake@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: James Bottomley <James.Bottomley@parallels.com>
Cc: "Niklas Söderlund" <niklas.soderlund@ericsson.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Josh Boyer <jwboyer@gmail.com>
Cc: Mike Williams <mike@mikebwilliams.com>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

1 files changed, 13 insertions, 8 deletions

diff --git a/include/linux/edac.h b/include/linux/edac.h
index 52bceca85e63..87aa07d2ee28 100644
--- a/include/linux/edac.h
+++ b/include/linux/edac.h
@@ -318,6 +318,13 @@ struct dimm_info {
         unsigned memory_controller;
         unsigned csrow;
         unsigned csrow_channel;
+
+        u32 grain;              /* granularity of reported error in bytes */
+        enum dev_type dtype;    /* memory device type */
+        enum mem_type mtype;    /* memory dimm type */
+        enum edac_type edac_mode;       /* EDAC mode for this dimm */
+
+        u32 ce_count;           /* Correctable Errors for this dimm */
 };
 
 /**
@@ -343,19 +350,17 @@ struct rank_info {
 };
 
 struct csrow_info {
-        unsigned long first_page;       /* first page number in dimm */
-        unsigned long last_page;        /* last page number in dimm */
+        unsigned long first_page;       /* first page number in csrow */
+        unsigned long last_page;        /* last page number in csrow */
+        u32 nr_pages;                   /* number of pages in csrow */
         unsigned long page_mask;        /* used for interleaving -
                                          * 0UL for non intlv
                                          */
-        u32 nr_pages;           /* number of pages in csrow */
-        u32 grain;              /* granularity of reported error in bytes */
-        int csrow_idx;          /* the chip-select row */
-        enum dev_type dtype;    /* memory device type */
+        int csrow_idx;                  /* the chip-select row */
+
         u32 ue_count;           /* Uncorrectable Errors for this csrow */
         u32 ce_count;           /* Correctable Errors for this csrow */
-        enum mem_type mtype;    /* memory csrow type */
-        enum edac_type edac_mode;       /* EDAC mode for this csrow */
+
         struct mem_ctl_info *mci;       /* the parent */
 
         struct kobject kobj;    /* sysfs kobject for this csrow */