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authorSuresh Siddha <suresh.b.siddha@intel.com>2008-07-10 14:16:43 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-12 02:44:53 -0400
commit2ae21010694e56461a63bfc80e960090ce0a5ed9 (patch)
treed4ecdb710c4361df473b063eda9e1426fcf5c309 /include/linux/dmar.h
parentfe962e90cb17a8426e144dee970e77ed789d98ee (diff)
x64, x2apic/intr-remap: Interrupt remapping infrastructure
Interrupt remapping (part of Intel Virtualization Tech for directed I/O) infrastructure. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/linux/dmar.h')
-rw-r--r--include/linux/dmar.h120
1 files changed, 85 insertions, 35 deletions
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index c4e96eb29617..8a0238dd2c11 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -25,9 +25,85 @@
25#include <linux/types.h> 25#include <linux/types.h>
26#include <linux/msi.h> 26#include <linux/msi.h>
27 27
28#ifdef CONFIG_DMAR 28#if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
29struct intel_iommu; 29struct intel_iommu;
30 30
31struct dmar_drhd_unit {
32 struct list_head list; /* list of drhd units */
33 struct acpi_dmar_header *hdr; /* ACPI header */
34 u64 reg_base_addr; /* register base address*/
35 struct pci_dev **devices; /* target device array */
36 int devices_cnt; /* target device count */
37 u8 ignored:1; /* ignore drhd */
38 u8 include_all:1;
39 struct intel_iommu *iommu;
40};
41
42extern struct list_head dmar_drhd_units;
43
44#define for_each_drhd_unit(drhd) \
45 list_for_each_entry(drhd, &dmar_drhd_units, list)
46
47extern int dmar_table_init(void);
48extern int early_dmar_detect(void);
49extern int dmar_dev_scope_init(void);
50
51/* Intel IOMMU detection */
52extern void detect_intel_iommu(void);
53
54
55extern int parse_ioapics_under_ir(void);
56extern int alloc_iommu(struct dmar_drhd_unit *);
57#else
58static inline void detect_intel_iommu(void)
59{
60 return;
61}
62
63static inline int dmar_table_init(void)
64{
65 return -ENODEV;
66}
67#endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */
68
69#ifdef CONFIG_INTR_REMAP
70extern int intr_remapping_enabled;
71extern int enable_intr_remapping(int);
72
73struct irte {
74 union {
75 struct {
76 __u64 present : 1,
77 fpd : 1,
78 dst_mode : 1,
79 redir_hint : 1,
80 trigger_mode : 1,
81 dlvry_mode : 3,
82 avail : 4,
83 __reserved_1 : 4,
84 vector : 8,
85 __reserved_2 : 8,
86 dest_id : 32;
87 };
88 __u64 low;
89 };
90
91 union {
92 struct {
93 __u64 sid : 16,
94 sq : 2,
95 svt : 2,
96 __reserved_3 : 44;
97 };
98 __u64 high;
99 };
100};
101#else
102#define enable_intr_remapping(mode) (-1)
103#define intr_remapping_enabled (0)
104#endif
105
106#ifdef CONFIG_DMAR
31extern const char *dmar_get_fault_reason(u8 fault_reason); 107extern const char *dmar_get_fault_reason(u8 fault_reason);
32 108
33/* Can't use the common MSI interrupt functions 109/* Can't use the common MSI interrupt functions
@@ -40,29 +116,8 @@ extern void dmar_msi_write(int irq, struct msi_msg *msg);
40extern int dmar_set_interrupt(struct intel_iommu *iommu); 116extern int dmar_set_interrupt(struct intel_iommu *iommu);
41extern int arch_setup_dmar_msi(unsigned int irq); 117extern int arch_setup_dmar_msi(unsigned int irq);
42 118
43/* Intel IOMMU detection and initialization functions */ 119extern int iommu_detected, no_iommu;
44extern void detect_intel_iommu(void);
45extern int intel_iommu_init(void);
46
47extern int dmar_table_init(void);
48extern int early_dmar_detect(void);
49extern int dmar_dev_scope_init(void);
50extern int parse_ioapics_under_ir(void);
51
52extern struct list_head dmar_drhd_units;
53extern struct list_head dmar_rmrr_units; 120extern struct list_head dmar_rmrr_units;
54
55struct dmar_drhd_unit {
56 struct list_head list; /* list of drhd units */
57 struct acpi_dmar_header *hdr; /* ACPI header */
58 u64 reg_base_addr; /* register base address*/
59 struct pci_dev **devices; /* target device array */
60 int devices_cnt; /* target device count */
61 u8 ignored:1; /* ignore drhd */
62 u8 include_all:1;
63 struct intel_iommu *iommu;
64};
65
66struct dmar_rmrr_unit { 121struct dmar_rmrr_unit {
67 struct list_head list; /* list of rmrr units */ 122 struct list_head list; /* list of rmrr units */
68 struct acpi_dmar_header *hdr; /* ACPI header */ 123 struct acpi_dmar_header *hdr; /* ACPI header */
@@ -72,24 +127,19 @@ struct dmar_rmrr_unit {
72 int devices_cnt; /* target device count */ 127 int devices_cnt; /* target device count */
73}; 128};
74 129
75#define for_each_drhd_unit(drhd) \
76 list_for_each_entry(drhd, &dmar_drhd_units, list)
77#define for_each_rmrr_units(rmrr) \ 130#define for_each_rmrr_units(rmrr) \
78 list_for_each_entry(rmrr, &dmar_rmrr_units, list) 131 list_for_each_entry(rmrr, &dmar_rmrr_units, list)
79 132/* Intel DMAR initialization functions */
80extern int alloc_iommu(struct dmar_drhd_unit *); 133extern int intel_iommu_init(void);
134extern int dmar_disabled;
81#else 135#else
82static inline void detect_intel_iommu(void)
83{
84 return;
85}
86static inline int intel_iommu_init(void) 136static inline int intel_iommu_init(void)
87{ 137{
138#ifdef CONFIG_INTR_REMAP
139 return dmar_dev_scope_init();
140#else
88 return -ENODEV; 141 return -ENODEV;
89} 142#endif
90static inline int dmar_table_init(void)
91{
92 return -ENODEV;
93} 143}
94#endif /* !CONFIG_DMAR */ 144#endif /* !CONFIG_DMAR */
95#endif /* __DMAR_H__ */ 145#endif /* __DMAR_H__ */