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authorDan Williams <dan.j.williams@intel.com>2008-02-02 21:49:58 -0500
committerDan Williams <dan.j.williams@intel.com>2008-02-06 12:12:18 -0500
commitd4c56f97ff21df405d0cebe11f49e3c3c79662b5 (patch)
treee6b0de433d7c985982ac12815998242a786d87b2 /include/linux/dmaengine.h
parent0036731c88fdb5bf4f04a796a30b5e445fc57f54 (diff)
async_tx: replace 'int_en' with operation preparation flags
Pass a full set of flags to drivers' per-operation 'prep' routines. Currently the only flag passed is DMA_PREP_INTERRUPT. The expectation is that arch-specific async_tx_find_channel() implementations can exploit this capability to find the best channel for an operation. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Shannon Nelson <shannon.nelson@intel.com> Reviewed-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'include/linux/dmaengine.h')
-rw-r--r--include/linux/dmaengine.h17
1 files changed, 13 insertions, 4 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index b0864f5b729d..acbb364674ff 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -95,6 +95,15 @@ enum dma_transaction_type {
95#define DMA_TX_TYPE_END (DMA_INTERRUPT + 1) 95#define DMA_TX_TYPE_END (DMA_INTERRUPT + 1)
96 96
97/** 97/**
98 * enum dma_prep_flags - DMA flags to augment operation preparation
99 * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of
100 * this transaction
101 */
102enum dma_prep_flags {
103 DMA_PREP_INTERRUPT = (1 << 0),
104};
105
106/**
98 * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t. 107 * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t.
99 * See linux/cpumask.h 108 * See linux/cpumask.h
100 */ 109 */
@@ -274,16 +283,16 @@ struct dma_device {
274 283
275 struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)( 284 struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)(
276 struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, 285 struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
277 size_t len, int int_en); 286 size_t len, unsigned long flags);
278 struct dma_async_tx_descriptor *(*device_prep_dma_xor)( 287 struct dma_async_tx_descriptor *(*device_prep_dma_xor)(
279 struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src, 288 struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src,
280 unsigned int src_cnt, size_t len, int int_en); 289 unsigned int src_cnt, size_t len, unsigned long flags);
281 struct dma_async_tx_descriptor *(*device_prep_dma_zero_sum)( 290 struct dma_async_tx_descriptor *(*device_prep_dma_zero_sum)(
282 struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, 291 struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,
283 size_t len, u32 *result, int int_en); 292 size_t len, u32 *result, unsigned long flags);
284 struct dma_async_tx_descriptor *(*device_prep_dma_memset)( 293 struct dma_async_tx_descriptor *(*device_prep_dma_memset)(
285 struct dma_chan *chan, dma_addr_t dest, int value, size_t len, 294 struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
286 int int_en); 295 unsigned long flags);
287 struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)( 296 struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(
288 struct dma_chan *chan); 297 struct dma_chan *chan);
289 298