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authorDan Williams <dan.j.williams@intel.com>2010-10-07 19:44:50 -0400
committerDan Williams <dan.j.williams@intel.com>2010-10-07 20:08:32 -0400
commit5fc6d897fde352bad5db5767e7260741a8cdd9e9 (patch)
treecb918dd33b8288aadead08b04b9f308f9d8bcbd1 /include/linux/dmaengine.h
parent400fb7f6a0cfe13025cb0296fdb4737da7025a8a (diff)
async_tx: make async_tx channel switching opt-in
The majority of drivers in drivers/dma/ will never establish cross channel operation chains and do not need the extra overhead in struct dma_async_tx_descriptor. Make channel switching opt-in by default. Cc: Anatolij Gustschin <agust@denx.de> Cc: Ira Snyder <iws@ovro.caltech.edu> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: Saeed Bishara <saeed@marvell.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'include/linux/dmaengine.h')
-rw-r--r--include/linux/dmaengine.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 3934ebdd85c2..9d8688b92d8b 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -321,14 +321,14 @@ struct dma_async_tx_descriptor {
321 dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx); 321 dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx);
322 dma_async_tx_callback callback; 322 dma_async_tx_callback callback;
323 void *callback_param; 323 void *callback_param;
324#ifndef CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH 324#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
325 struct dma_async_tx_descriptor *next; 325 struct dma_async_tx_descriptor *next;
326 struct dma_async_tx_descriptor *parent; 326 struct dma_async_tx_descriptor *parent;
327 spinlock_t lock; 327 spinlock_t lock;
328#endif 328#endif
329}; 329};
330 330
331#ifdef CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH 331#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
332static inline void txd_lock(struct dma_async_tx_descriptor *txd) 332static inline void txd_lock(struct dma_async_tx_descriptor *txd)
333{ 333{
334} 334}
@@ -656,11 +656,11 @@ static inline void net_dmaengine_put(void)
656#ifdef CONFIG_ASYNC_TX_DMA 656#ifdef CONFIG_ASYNC_TX_DMA
657#define async_dmaengine_get() dmaengine_get() 657#define async_dmaengine_get() dmaengine_get()
658#define async_dmaengine_put() dmaengine_put() 658#define async_dmaengine_put() dmaengine_put()
659#ifdef CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH 659#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH
660#define async_dma_find_channel(type) dma_find_channel(DMA_ASYNC_TX) 660#define async_dma_find_channel(type) dma_find_channel(DMA_ASYNC_TX)
661#else 661#else
662#define async_dma_find_channel(type) dma_find_channel(type) 662#define async_dma_find_channel(type) dma_find_channel(type)
663#endif /* CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH */ 663#endif /* CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH */
664#else 664#else
665static inline void async_dmaengine_get(void) 665static inline void async_dmaengine_get(void)
666{ 666{