diff options
author | Daniel Drake <dsd@laptop.org> | 2011-06-25 12:34:14 -0400 |
---|---|---|
committer | H. Peter Anvin <hpa@linux.intel.com> | 2011-07-06 17:44:38 -0400 |
commit | 7bc74b3df73776fe06f3df9fafd2d2698e6ca28a (patch) | |
tree | 166bd6e0b0de947dd278acac03480eb359bff93e /include/linux/cs5535.h | |
parent | bc4ecd5a5efc2435e6debfb7b279a15ae96697fd (diff) |
x86, olpc-xo1-sci: Add GPE handler and ebook switch functionality
The EC in the OLPC XO-1 delivers GPE events to provide various
notifications. Add the basic code for GPE/EC event processing and
enable the ebook switch, which can be used as a wakeup source.
Signed-off-by: Daniel Drake <dsd@laptop.org>
Link: http://lkml.kernel.org/r/1309019658-1712-8-git-send-email-dsd@laptop.org
Acked-by: Andres Salomon <dilinger@queued.net>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'include/linux/cs5535.h')
-rw-r--r-- | include/linux/cs5535.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/include/linux/cs5535.h b/include/linux/cs5535.h index 6f78235cb905..d7e9a7f6ddb0 100644 --- a/include/linux/cs5535.h +++ b/include/linux/cs5535.h | |||
@@ -11,6 +11,8 @@ | |||
11 | #ifndef _CS5535_H | 11 | #ifndef _CS5535_H |
12 | #define _CS5535_H | 12 | #define _CS5535_H |
13 | 13 | ||
14 | #include <asm/msr.h> | ||
15 | |||
14 | /* MSRs */ | 16 | /* MSRs */ |
15 | #define MSR_GLIU_P2D_RO0 0x10000029 | 17 | #define MSR_GLIU_P2D_RO0 0x10000029 |
16 | 18 | ||
@@ -43,6 +45,18 @@ | |||
43 | #define MSR_GX_GLD_MSR_CONFIG 0xC0002001 | 45 | #define MSR_GX_GLD_MSR_CONFIG 0xC0002001 |
44 | #define MSR_GX_MSR_PADSEL 0xC0002011 | 46 | #define MSR_GX_MSR_PADSEL 0xC0002011 |
45 | 47 | ||
48 | static inline int cs5535_pic_unreqz_select_high(unsigned int group, | ||
49 | unsigned int irq) | ||
50 | { | ||
51 | uint32_t lo, hi; | ||
52 | |||
53 | rdmsr(MSR_PIC_ZSEL_HIGH, lo, hi); | ||
54 | lo &= ~(0xF << (group * 4)); | ||
55 | lo |= (irq & 0xF) << (group * 4); | ||
56 | wrmsr(MSR_PIC_ZSEL_HIGH, lo, hi); | ||
57 | return 0; | ||
58 | } | ||
59 | |||
46 | /* PIC registers */ | 60 | /* PIC registers */ |
47 | #define CS5536_PIC_INT_SEL1 0x4d0 | 61 | #define CS5536_PIC_INT_SEL1 0x4d0 |
48 | #define CS5536_PIC_INT_SEL2 0x4d1 | 62 | #define CS5536_PIC_INT_SEL2 0x4d1 |
@@ -73,6 +87,7 @@ | |||
73 | #define CS5536_PM1_EN 0x02 | 87 | #define CS5536_PM1_EN 0x02 |
74 | #define CS5536_PM1_CNT 0x08 | 88 | #define CS5536_PM1_CNT 0x08 |
75 | #define CS5536_PM_GPE0_STS 0x18 | 89 | #define CS5536_PM_GPE0_STS 0x18 |
90 | #define CS5536_PM_GPE0_EN 0x1c | ||
76 | 91 | ||
77 | /* CS5536_PM1_STS bits */ | 92 | /* CS5536_PM1_STS bits */ |
78 | #define CS5536_WAK_FLAG (1 << 15) | 93 | #define CS5536_WAK_FLAG (1 << 15) |
@@ -81,6 +96,13 @@ | |||
81 | /* CS5536_PM1_EN bits */ | 96 | /* CS5536_PM1_EN bits */ |
82 | #define CS5536_PM_PWRBTN (1 << 8) | 97 | #define CS5536_PM_PWRBTN (1 << 8) |
83 | 98 | ||
99 | /* CS5536_PM_GPE0_STS bits */ | ||
100 | #define CS5536_GPIOM7_PME_FLAG (1 << 31) | ||
101 | #define CS5536_GPIOM6_PME_FLAG (1 << 30) | ||
102 | |||
103 | /* CS5536_PM_GPE0_EN bits */ | ||
104 | #define CS5536_GPIOM7_PME_EN (1 << 31) | ||
105 | |||
84 | /* VSA2 magic values */ | 106 | /* VSA2 magic values */ |
85 | #define VSA_VRC_INDEX 0xAC1C | 107 | #define VSA_VRC_INDEX 0xAC1C |
86 | #define VSA_VRC_DATA 0xAC1E | 108 | #define VSA_VRC_DATA 0xAC1E |