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authorMike Turquette <mturquette@linaro.org>2012-03-16 02:11:20 -0400
committerArnd Bergmann <arnd@arndb.de>2012-03-16 16:35:02 -0400
commit9d9f78ed9af0e465d2fd15550471956e7f559b9f (patch)
tree8a65fc0844a35c928162f65b671a8a5786ea03ee /include/linux/clk-private.h
parentb2476490ef11134b65544d8f062cff96c53e941b (diff)
clk: basic clock hardware types
Many platforms support simple gateable clocks, fixed-rate clocks, adjustable divider clocks and multi-parent multiplexer clocks. This patch introduces basic clock types for the above-mentioned hardware which share some common characteristics. Based on original work by Jeremy Kerr and contribution by Jamie Iles. Dividers and multiplexor clocks originally contributed by Richard Zhao & Sascha Hauer. Signed-off-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Mike Turquette <mturquette@ti.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Jeremy Kerr <jeremy.kerr@canonical.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Arnd Bergman <arnd.bergmann@linaro.org> Cc: Paul Walmsley <paul@pwsan.com> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Jamie Iles <jamie@jamieiles.com> Cc: Richard Zhao <richard.zhao@linaro.org> Cc: Saravana Kannan <skannan@codeaurora.org> Cc: Magnus Damm <magnus.damm@gmail.com> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Linus Walleij <linus.walleij@stericsson.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Amit Kucheria <amit.kucheria@linaro.org> Cc: Deepak Saxena <dsaxena@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'include/linux/clk-private.h')
-rw-r--r--include/linux/clk-private.h124
1 files changed, 124 insertions, 0 deletions
diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h
index e2cce6fa6046..5e4312b6f5cc 100644
--- a/include/linux/clk-private.h
+++ b/include/linux/clk-private.h
@@ -46,6 +46,130 @@ struct clk {
46#endif 46#endif
47}; 47};
48 48
49/*
50 * DOC: Basic clock implementations common to many platforms
51 *
52 * Each basic clock hardware type is comprised of a structure describing the
53 * clock hardware, implementations of the relevant callbacks in struct clk_ops,
54 * unique flags for that hardware type, a registration function and an
55 * alternative macro for static initialization
56 */
57
58extern struct clk_ops clk_fixed_rate_ops;
59
60#define DEFINE_CLK_FIXED_RATE(_name, _flags, _rate, \
61 _fixed_rate_flags) \
62 static struct clk _name; \
63 static char *_name##_parent_names[] = {}; \
64 static struct clk_fixed_rate _name##_hw = { \
65 .hw = { \
66 .clk = &_name, \
67 }, \
68 .fixed_rate = _rate, \
69 .flags = _fixed_rate_flags, \
70 }; \
71 static struct clk _name = { \
72 .name = #_name, \
73 .ops = &clk_fixed_rate_ops, \
74 .hw = &_name##_hw.hw, \
75 .parent_names = _name##_parent_names, \
76 .num_parents = \
77 ARRAY_SIZE(_name##_parent_names), \
78 .flags = _flags, \
79 };
80
81extern struct clk_ops clk_gate_ops;
82
83#define DEFINE_CLK_GATE(_name, _parent_name, _parent_ptr, \
84 _flags, _reg, _bit_idx, \
85 _gate_flags, _lock) \
86 static struct clk _name; \
87 static char *_name##_parent_names[] = { \
88 _parent_name, \
89 }; \
90 static struct clk *_name##_parents[] = { \
91 _parent_ptr, \
92 }; \
93 static struct clk_gate _name##_hw = { \
94 .hw = { \
95 .clk = &_name, \
96 }, \
97 .reg = _reg, \
98 .bit_idx = _bit_idx, \
99 .flags = _gate_flags, \
100 .lock = _lock, \
101 }; \
102 static struct clk _name = { \
103 .name = #_name, \
104 .ops = &clk_gate_ops, \
105 .hw = &_name##_hw.hw, \
106 .parent_names = _name##_parent_names, \
107 .num_parents = \
108 ARRAY_SIZE(_name##_parent_names), \
109 .parents = _name##_parents, \
110 .flags = _flags, \
111 };
112
113extern struct clk_ops clk_divider_ops;
114
115#define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
116 _flags, _reg, _shift, _width, \
117 _divider_flags, _lock) \
118 static struct clk _name; \
119 static char *_name##_parent_names[] = { \
120 _parent_name, \
121 }; \
122 static struct clk *_name##_parents[] = { \
123 _parent_ptr, \
124 }; \
125 static struct clk_divider _name##_hw = { \
126 .hw = { \
127 .clk = &_name, \
128 }, \
129 .reg = _reg, \
130 .shift = _shift, \
131 .width = _width, \
132 .flags = _divider_flags, \
133 .lock = _lock, \
134 }; \
135 static struct clk _name = { \
136 .name = #_name, \
137 .ops = &clk_divider_ops, \
138 .hw = &_name##_hw.hw, \
139 .parent_names = _name##_parent_names, \
140 .num_parents = \
141 ARRAY_SIZE(_name##_parent_names), \
142 .parents = _name##_parents, \
143 .flags = _flags, \
144 };
145
146extern struct clk_ops clk_mux_ops;
147
148#define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \
149 _reg, _shift, _width, \
150 _mux_flags, _lock) \
151 static struct clk _name; \
152 static struct clk_mux _name##_hw = { \
153 .hw = { \
154 .clk = &_name, \
155 }, \
156 .reg = _reg, \
157 .shift = _shift, \
158 .width = _width, \
159 .flags = _mux_flags, \
160 .lock = _lock, \
161 }; \
162 static struct clk _name = { \
163 .name = #_name, \
164 .ops = &clk_mux_ops, \
165 .hw = &_name##_hw.hw, \
166 .parent_names = _parent_names, \
167 .num_parents = \
168 ARRAY_SIZE(_parent_names), \
169 .parents = _parents, \
170 .flags = _flags, \
171 };
172
49/** 173/**
50 * __clk_init - initialize the data structures in a struct clk 174 * __clk_init - initialize the data structures in a struct clk
51 * @dev: device initializing this clk, placeholder for now 175 * @dev: device initializing this clk, placeholder for now
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 20:03:20 -0500