bcma: add PCIe host controller

Some SoCs have a PCIe host controller to make it possible to attach
some other devices to it, like an other Wifi card.
This code was tested with an Netgear WNDR3400 (bcm4716 based), but
should work with all bcma based SoCs.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

2 files changed, 65 insertions, 0 deletions

diff --git a/include/linux/bcma/bcma_driver_pci.h b/include/linux/bcma/bcma_driver_pci.h
index 679d4cab4547..46c71e27d31f 100644
--- a/include/linux/bcma/bcma_driver_pci.h
+++ b/include/linux/bcma/bcma_driver_pci.h
@@ -160,9 +160,44 @@ struct pci_dev;
 /* PCIcore specific boardflags */
 #define BCMA_CORE_PCI_BFL_NOPCI                 0x00000400 /* Board leaves PCI floating */
 
+/* PCIE Config space accessing MACROS */
+#define BCMA_CORE_PCI_CFG_BUS_SHIFT             24      /* Bus shift */
+#define BCMA_CORE_PCI_CFG_SLOT_SHIFT            19      /* Slot/Device shift */
+#define BCMA_CORE_PCI_CFG_FUN_SHIFT             16      /* Function shift */
+#define BCMA_CORE_PCI_CFG_OFF_SHIFT             0       /* Register shift */
+
+#define BCMA_CORE_PCI_CFG_BUS_MASK              0xff    /* Bus mask */
+#define BCMA_CORE_PCI_CFG_SLOT_MASK             0x1f    /* Slot/Device mask */
+#define BCMA_CORE_PCI_CFG_FUN_MASK              7       /* Function mask */
+#define BCMA_CORE_PCI_CFG_OFF_MASK              0xfff   /* Register mask */
+
+/* PCIE Root Capability Register bits (Host mode only) */
+#define BCMA_CORE_PCI_RC_CRS_VISIBILITY         0x0001
+
+struct bcma_drv_pci;
+
+#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
+struct bcma_drv_pci_host {
+        struct bcma_drv_pci *pdev;
+
+        u32 host_cfg_addr;
+        spinlock_t cfgspace_lock;
+
+        struct pci_controller pci_controller;
+        struct pci_ops pci_ops;
+        struct resource mem_resource;
+        struct resource io_resource;
+};
+#endif
+
 struct bcma_drv_pci {
         struct bcma_device *core;
         u8 setup_done:1;
+        u8 hostmode:1;
+
+#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
+        struct bcma_drv_pci_host *host_controller;
+#endif
 };
 
 /* Register access */
@@ -173,4 +208,7 @@ extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
 extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
                                  struct bcma_device *core, bool enable);
 
+extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
+extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
+
 #endif /* LINUX_BCMA_DRIVER_PCI_H_ */
diff --git a/include/linux/bcma/bcma_regs.h b/include/linux/bcma/bcma_regs.h
index 9faae2ae02e8..5a71d5719640 100644
--- a/include/linux/bcma/bcma_regs.h
+++ b/include/linux/bcma/bcma_regs.h
@@ -56,4 +56,31 @@
 #define  BCMA_PCI_GPIO_XTAL             0x40    /* PCI config space GPIO 14 for Xtal powerup */
 #define  BCMA_PCI_GPIO_PLL              0x80    /* PCI config space GPIO 15 for PLL powerdown */
 
+/* SiliconBackplane Address Map.
+ * All regions may not exist on all chips.
+ */
+#define BCMA_SOC_SDRAM_BASE             0x00000000U     /* Physical SDRAM */
+#define BCMA_SOC_PCI_MEM                0x08000000U     /* Host Mode sb2pcitranslation0 (64 MB) */
+#define BCMA_SOC_PCI_MEM_SZ             (64 * 1024 * 1024)
+#define BCMA_SOC_PCI_CFG                0x0c000000U     /* Host Mode sb2pcitranslation1 (64 MB) */
+#define BCMA_SOC_SDRAM_SWAPPED          0x10000000U     /* Byteswapped Physical SDRAM */
+#define BCMA_SOC_SDRAM_R2               0x80000000U     /* Region 2 for sdram (512 MB) */
+
+
+#define BCMA_SOC_PCI_DMA                0x40000000U     /* Client Mode sb2pcitranslation2 (1 GB) */
+#define BCMA_SOC_PCI_DMA2               0x80000000U     /* Client Mode sb2pcitranslation2 (1 GB) */
+#define BCMA_SOC_PCI_DMA_SZ             0x40000000U     /* Client Mode sb2pcitranslation2 size in bytes */
+#define BCMA_SOC_PCIE_DMA_L32           0x00000000U     /* PCIE Client Mode sb2pcitranslation2
+                                                         * (2 ZettaBytes), low 32 bits
+                                                         */
+#define BCMA_SOC_PCIE_DMA_H32           0x80000000U     /* PCIE Client Mode sb2pcitranslation2
+                                                         * (2 ZettaBytes), high 32 bits
+                                                         */
+
+#define BCMA_SOC_PCI1_MEM               0x40000000U     /* Host Mode sb2pcitranslation0 (64 MB) */
+#define BCMA_SOC_PCI1_CFG               0x44000000U     /* Host Mode sb2pcitranslation1 (64 MB) */
+#define BCMA_SOC_PCIE1_DMA_H32          0xc0000000U     /* PCIE Client Mode sb2pcitranslation2
+                                                         * (2 ZettaBytes), high 32 bits
+                                                         */
+
 #endif /* LINUX_BCMA_REGS_H_ */