[ARM] 4151/1: AT91 / AVR32: Move at91_pdc.h to linux/atmel_pdc.h

The Atmel AT91 and AVR32 processor architectures share many of the same
peripherals.  The PDC (Peripheral Data Controller) registers are also
implemented within in a number of the on-chip peripherals (eg, USART,
MMC, SPI, SSC, etc).

In a attempt not to duplicate the register definitions in each
peripheral, or in each architecture, the at91_pdc.h header in
asm-arm/arch-at91 and asm-avr32/arch-at32ap has been replaced with
linux/atmel_pdc.h.

The definitions have also been renamed from AT91_PDC_* to ATMEL_PDC_*,
and the drivers updated accordingly.

Original patch from Nicolas Ferre.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 36 insertions, 0 deletions

diff --git a/include/linux/atmel_pdc.h b/include/linux/atmel_pdc.h
new file mode 100644
index 000000000000..5058a31d2ce8
--- /dev/null
+++ b/include/linux/atmel_pdc.h
@@ -0,0 +1,36 @@
+/*
+ * include/linux/atmel_pdc.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * Peripheral Data Controller (PDC) registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef ATMEL_PDC_H
+#define ATMEL_PDC_H
+
+#define ATMEL_PDC_RPR           0x100   /* Receive Pointer Register */
+#define ATMEL_PDC_RCR           0x104   /* Receive Counter Register */
+#define ATMEL_PDC_TPR           0x108   /* Transmit Pointer Register */
+#define ATMEL_PDC_TCR           0x10c   /* Transmit Counter Register */
+#define ATMEL_PDC_RNPR          0x110   /* Receive Next Pointer Register */
+#define ATMEL_PDC_RNCR          0x114   /* Receive Next Counter Register */
+#define ATMEL_PDC_TNPR          0x118   /* Transmit Next Pointer Register */
+#define ATMEL_PDC_TNCR          0x11c   /* Transmit Next Counter Register */
+
+#define ATMEL_PDC_PTCR          0x120   /* Transfer Control Register */
+#define         ATMEL_PDC_RXTEN         (1 << 0)        /* Receiver Transfer Enable */
+#define         ATMEL_PDC_RXTDIS        (1 << 1)        /* Receiver Transfer Disable */
+#define         ATMEL_PDC_TXTEN         (1 << 8)        /* Transmitter Transfer Enable */
+#define         ATMEL_PDC_TXTDIS        (1 << 9)        /* Transmitter Transfer Disable */
+
+#define ATMEL_PDC_PTSR          0x124   /* Transfer Status Register */
+
+#endif