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authorDan Williams <dan.j.williams@intel.com>2008-02-02 21:30:14 -0500
committerDan Williams <dan.j.williams@intel.com>2008-02-06 12:12:17 -0500
commitd909b347591a23c5a2c324fbccd4c9c966f31c67 (patch)
tree1092bfdc2722eed041a29752a62836366855c30a /include/linux/async_tx.h
parente73ef9acfd30f36bf7c60237ecffe7bbca8068d6 (diff)
async_tx: kill ASYNC_TX_ASSUME_COHERENT
Remove the unused ASYNC_TX_ASSUME_COHERENT flag. Async_tx is meant to hide the difference between asynchronous hardware and synchronous software operations, this flag requires clients to understand cache coherency consequences of the async path. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Reviewed-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'include/linux/async_tx.h')
-rw-r--r--include/linux/async_tx.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/include/linux/async_tx.h b/include/linux/async_tx.h
index bdca3f1b3213..3d59d371dd32 100644
--- a/include/linux/async_tx.h
+++ b/include/linux/async_tx.h
@@ -47,7 +47,6 @@ struct dma_chan_ref {
47 * address is an implied source, whereas the asynchronous case it must be listed 47 * address is an implied source, whereas the asynchronous case it must be listed
48 * as a source. The destination address must be the first address in the source 48 * as a source. The destination address must be the first address in the source
49 * array. 49 * array.
50 * @ASYNC_TX_ASSUME_COHERENT: skip cache maintenance operations
51 * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a 50 * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a
52 * dependency chain 51 * dependency chain
53 * @ASYNC_TX_DEP_ACK: ack the dependency descriptor. Useful for chaining. 52 * @ASYNC_TX_DEP_ACK: ack the dependency descriptor. Useful for chaining.
@@ -55,7 +54,6 @@ struct dma_chan_ref {
55enum async_tx_flags { 54enum async_tx_flags {
56 ASYNC_TX_XOR_ZERO_DST = (1 << 0), 55 ASYNC_TX_XOR_ZERO_DST = (1 << 0),
57 ASYNC_TX_XOR_DROP_DST = (1 << 1), 56 ASYNC_TX_XOR_DROP_DST = (1 << 1),
58 ASYNC_TX_ASSUME_COHERENT = (1 << 2),
59 ASYNC_TX_ACK = (1 << 3), 57 ASYNC_TX_ACK = (1 << 3),
60 ASYNC_TX_DEP_ACK = (1 << 4), 58 ASYNC_TX_DEP_ACK = (1 << 4),
61}; 59};