diff options
author | Linus Walleij <linus.walleij@stericsson.com> | 2009-08-15 10:12:05 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-18 17:09:02 -0400 |
commit | ee2b805c8eb6459cf541ef141ff70dae17af59ca (patch) | |
tree | ca1e0f1988e71f2285ca336d88c5da2c5efa8c71 /include/linux/amba | |
parent | a2ca00ea9398265a26eabb358bba83c8b75c463d (diff) |
ARM: 5678/1: SSP/SPI PL022 polarity terminology fix
The definition of the SPI clock phase for the Motorola mode of
the PL022 driver was incorrect: the spec had been interpreted as
data being recieved on rising or falling edge of the clocks while
the correct interpretation is that data can be recieved on the
first or second edge transition, falling or rising depending on
the polarity setting.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/linux/amba')
-rw-r--r-- | include/linux/amba/pl022.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/linux/amba/pl022.h b/include/linux/amba/pl022.h index dcad0ffd1755..e4836c6b3dd7 100644 --- a/include/linux/amba/pl022.h +++ b/include/linux/amba/pl022.h | |||
@@ -136,12 +136,12 @@ enum ssp_tx_level_trig { | |||
136 | 136 | ||
137 | /** | 137 | /** |
138 | * enum SPI Clock Phase - clock phase (Motorola SPI interface only) | 138 | * enum SPI Clock Phase - clock phase (Motorola SPI interface only) |
139 | * @SSP_CLK_RISING_EDGE: Receive data on rising edge | 139 | * @SSP_CLK_FIRST_EDGE: Receive data on first edge transition (actual direction depends on polarity) |
140 | * @SSP_CLK_FALLING_EDGE: Receive data on falling edge | 140 | * @SSP_CLK_SECOND_EDGE: Receive data on second edge transition (actual direction depends on polarity) |
141 | */ | 141 | */ |
142 | enum ssp_spi_clk_phase { | 142 | enum ssp_spi_clk_phase { |
143 | SSP_CLK_RISING_EDGE, | 143 | SSP_CLK_FIRST_EDGE, |
144 | SSP_CLK_FALLING_EDGE | 144 | SSP_CLK_SECOND_EDGE |
145 | }; | 145 | }; |
146 | 146 | ||
147 | /** | 147 | /** |