Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Arnd Bergmann:
 "The DT branch adds a lot of new stuff for additional SoC and board
  support.  The branch is the largest one and contains 513 out of the
  total 972 non-merge arm-soc changesets for 3.19.

  Most of the changes are about enabling additional on-chip devices for
  existing machines, but there are also an unusual number of new SoC
  types being added this time:

   - AMLogic Meson8
   - ARM Realview in DT mode
   - Allwinner A80
   - Broadcom BCM47081
   - Broadcom Cygnus
   - Freescale LS1021A
   - Freescale Vybrid 500 series
   - Mediatek MT6592, MT8127, MT8135
   - STMicroelectronics STiH410
   - Samsung Exynos4415

  The level of support for the above differs widely, some are just stubs
  with nothing more than CPU, memory and a UART, but others are fairly
  complete.  As usual, these get extended over time.

  There are also many new boards getting added, this is the list of
  model strings that are showing up in new dts files:

   - ARM RealView PB1176
   - Altera SOCFPGA Arria 10
   - Asus RT-N18U (BCM47081)
   - Buffalo WZR-1750DHP (BCM4708)
   - Buffalo WZR-600DHP2 (BCM47081)
   - Cygnus Enterprise Phone (BCM911360_ENTPHN)
   - D-Link DIR-665
   - Google Spring
   - IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)
   - IGEPv2 Rev. F (TI OMAP AM/DM37x)
   - LS1021A QDS Board
   - LS1021A TWR Board
   - LeMaker Banana Pi
   - MarsBoard RK3066
   - MediaTek MT8127 Moose Board
   - MediaTek MT8135 evaluation board
   - Mele M3
   - Merrii A80 Optimus Board
   - Netgear R6300 V2 (BCM4708)
   - Nomadik STN8815NHK
   - NovaTech OrionLXm
   - Olimex A20-OLinuXino-LIME2
   - Raspberry Pi Model B+
   - STiH410 B2120
   - Samsung Monk board
   - Samsung Rinato board
   - Synology DS213j
   - Synology DS414
   - TBS2910 Matrix ARM mini PC
   - TI AM5728 BeagleBoard-X15
   - Toradex Colibri VF50 on Colibri Evaluation Board
   - Zynq ZYBO Development Board

  Other notable changes include:

   - exynos: cleanup of existing dts files
   - mvebu: improved pinctrl support for Armada 370/XP
   - nomadik: restructuring dts files
   - omap: added CAN bus support
   - shmobile: added clock support for some SoCs
   - shmobile: added sound support for some SoCs
   - sirf: reset controller support
   - sunxi: continuing the relicensing under dual GPL/MIT
   - sunxi: lots of new on-chip device support
   - sunxi: working simplefb support (long awaited)
   - various: provide stdout-path property for earlycon"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (510 commits)
  ARM: dts: rk3288: add arm,cpu-registers-not-fw-configured
  Revert "ARM: dts: rockchip: temporarily disable smp on rk3288"
  ARM: BCM5301X: Add DT for Buffalo WZR-600DHP2
  ARM: BCM5301X: Add DT for Asus RT-N18U
  ARM: BCM5301X: Add DT for Buffalo WZR-1750DHP
  ARM: BCM5301X: Add DT for Netgear R6300 V2
  ARM: BCM5301X: Add buttons for Netgear R6250
  ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard
  ARM: BCM5301X: Add IRQs to Broadcom's bus-axi in DTS file
  arm: dts: zynq: Add Digilent ZYBO board
  arm: dts: zynq: Move crystal freq. to board level
  doc: dt: vendor-prefixes: Add Digilent Inc
  Documentation: devicetree: Fix Xilinx VDMA specification
  ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188
  ARM: dts: rockchip: add label property for leds on Radxa Rock
  ARM: BCM5301X: Add LEDs for Netgear R6250 V1
  ARM: BCM5301X: Add Broadcom's bus-axi to the DTS file
  ARM: dts: add sysreg phandle to i2c device nodes for exynos
  ARM: dts: Remove unused bootargs from exynos3250-rinato
  ARM: dts: add board dts file for Exynos3250-based Monk board
  ...

6 files changed, 144 insertions, 2 deletions

diff --git a/include/dt-bindings/clock/r8a7740-clock.h b/include/dt-bindings/clock/r8a7740-clock.h
index f6b4b0fe7a43..476135da0f23 100644
--- a/include/dt-bindings/clock/r8a7740-clock.h
+++ b/include/dt-bindings/clock/r8a7740-clock.h
@@ -40,6 +40,7 @@
 
 /* MSTP2 */
 #define R8A7740_CLK_SCIFA6      30
+#define R8A7740_CLK_INTCA       29
 #define R8A7740_CLK_SCIFA7      22
 #define R8A7740_CLK_DMAC1       18
 #define R8A7740_CLK_DMAC2       17
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 8ea7ab0346ad..c27b3b5133b9 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -26,8 +26,18 @@
 #define R8A7790_CLK_MSIOF0              0
 
 /* MSTP1 */
-#define R8A7790_CLK_JPU         6
+#define R8A7790_CLK_VCP1                0
+#define R8A7790_CLK_VCP0                1
+#define R8A7790_CLK_VPC1                2
+#define R8A7790_CLK_VPC0                3
+#define R8A7790_CLK_JPU                 6
+#define R8A7790_CLK_SSP1                9
 #define R8A7790_CLK_TMU1                11
+#define R8A7790_CLK_3DG                 12
+#define R8A7790_CLK_2DDMAC              15
+#define R8A7790_CLK_FDP1_2              17
+#define R8A7790_CLK_FDP1_1              18
+#define R8A7790_CLK_FDP1_0              19
 #define R8A7790_CLK_TMU3                21
 #define R8A7790_CLK_TMU2                22
 #define R8A7790_CLK_CMT0                24
@@ -68,6 +78,8 @@
 #define R8A7790_CLK_USBDMAC1            31
 
 /* MSTP5 */
+#define R8A7790_CLK_AUDIO_DMAC1         1
+#define R8A7790_CLK_AUDIO_DMAC0         2
 #define R8A7790_CLK_THERMAL             22
 #define R8A7790_CLK_PWM                 23
 
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index 58c3f49d068c..3ea2bbc0da3f 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -25,8 +25,15 @@
 #define R8A7791_CLK_MSIOF0              0
 
 /* MSTP1 */
-#define R8A7791_CLK_JPU         6
+#define R8A7791_CLK_VCP0                1
+#define R8A7791_CLK_VPC0                3
+#define R8A7791_CLK_JPU                 6
+#define R8A7791_CLK_SSP1                9
 #define R8A7791_CLK_TMU1                11
+#define R8A7791_CLK_3DG                 12
+#define R8A7791_CLK_2DDMAC              15
+#define R8A7791_CLK_FDP1_1              18
+#define R8A7791_CLK_FDP1_0              19
 #define R8A7791_CLK_TMU3                21
 #define R8A7791_CLK_TMU2                22
 #define R8A7791_CLK_CMT0                24
@@ -62,6 +69,8 @@
 #define R8A7791_CLK_USBDMAC1            31
 
 /* MSTP5 */
+#define R8A7791_CLK_AUDIO_DMAC1         1
+#define R8A7791_CLK_AUDIO_DMAC0         2
 #define R8A7791_CLK_THERMAL             22
 #define R8A7791_CLK_PWM                 23
 
diff --git a/include/dt-bindings/clock/r8a7794-clock.h b/include/dt-bindings/clock/r8a7794-clock.h
index 9ac1043e25bc..aa9c286e60c0 100644
--- a/include/dt-bindings/clock/r8a7794-clock.h
+++ b/include/dt-bindings/clock/r8a7794-clock.h
@@ -26,11 +26,18 @@
 #define R8A7794_CLK_MSIOF0              0
 
 /* MSTP1 */
+#define R8A7794_CLK_VCP0                1
+#define R8A7794_CLK_VPC0                3
 #define R8A7794_CLK_TMU1                11
+#define R8A7794_CLK_3DG                 12
+#define R8A7794_CLK_2DDMAC              15
+#define R8A7794_CLK_FDP1_0              19
 #define R8A7794_CLK_TMU3                21
 #define R8A7794_CLK_TMU2                22
 #define R8A7794_CLK_CMT0                24
 #define R8A7794_CLK_TMU0                25
+#define R8A7794_CLK_VSP1_DU0            28
+#define R8A7794_CLK_VSP1_S              31
 
 /* MSTP2 */
 #define R8A7794_CLK_SCIFA2              2
@@ -61,6 +68,8 @@
 #define R8A7794_CLK_SCIF0               21
 
 /* MSTP8 */
+#define R8A7794_CLK_VIN1                10
+#define R8A7794_CLK_VIN0                11
 #define R8A7794_CLK_ETHER               13
 
 /* MSTP9 */
diff --git a/include/dt-bindings/clock/stih407-clks.h b/include/dt-bindings/clock/stih407-clks.h
new file mode 100644
index 000000000000..7af2b717b3b2
--- /dev/null
+++ b/include/dt-bindings/clock/stih407-clks.h
@@ -0,0 +1,86 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH407 SoC.
+ */
+#ifndef _DT_BINDINGS_CLK_STIH407
+#define _DT_BINDINGS_CLK_STIH407
+
+/* CLOCKGEN C0 */
+#define CLK_ICN_GPU             0
+#define CLK_FDMA                1
+#define CLK_NAND                2
+#define CLK_HVA                 3
+#define CLK_PROC_STFE           4
+#define CLK_PROC_TP             5
+#define CLK_RX_ICN_DMU          6
+#define CLK_RX_ICN_DISP_0       6
+#define CLK_RX_ICN_DISP_1       6
+#define CLK_RX_ICN_HVA          7
+#define CLK_RX_ICN_TS           7
+#define CLK_ICN_CPU             8
+#define CLK_TX_ICN_DMU          9
+#define CLK_TX_ICN_HVA          9
+#define CLK_TX_ICN_TS           9
+#define CLK_ICN_COMPO           9
+#define CLK_MMC_0               10
+#define CLK_MMC_1               11
+#define CLK_JPEGDEC             12
+#define CLK_ICN_REG             13
+#define CLK_TRACE_A9            13
+#define CLK_PTI_STM             13
+#define CLK_EXT2F_A9            13
+#define CLK_IC_BDISP_0          14
+#define CLK_IC_BDISP_1          15
+#define CLK_PP_DMU              16
+#define CLK_VID_DMU             17
+#define CLK_DSS_LPC             18
+#define CLK_ST231_AUD_0         19
+#define CLK_ST231_GP_0          19
+#define CLK_ST231_GP_1          20
+#define CLK_ST231_DMU           21
+#define CLK_ICN_LMI             22
+#define CLK_TX_ICN_DISP_0       23
+#define CLK_TX_ICN_DISP_1       23
+#define CLK_ICN_SBC             24
+#define CLK_STFE_FRC2           25
+#define CLK_ETH_PHY             26
+#define CLK_ETH_REF_PHYCLK      27
+#define CLK_FLASH_PROMIP        28
+#define CLK_MAIN_DISP           29
+#define CLK_AUX_DISP            30
+#define CLK_COMPO_DVP           31
+
+/* CLOCKGEN D0 */
+#define CLK_PCM_0               0
+#define CLK_PCM_1               1
+#define CLK_PCM_2               2
+#define CLK_SPDIFF              3
+
+/* CLOCKGEN D2 */
+#define CLK_PIX_MAIN_DISP       0
+#define CLK_PIX_PIP             1
+#define CLK_PIX_GDP1            2
+#define CLK_PIX_GDP2            3
+#define CLK_PIX_GDP3            4
+#define CLK_PIX_GDP4            5
+#define CLK_PIX_AUX_DISP        6
+#define CLK_DENC                7
+#define CLK_PIX_HDDAC           8
+#define CLK_HDDAC               9
+#define CLK_SDDAC               10
+#define CLK_PIX_DVO             11
+#define CLK_DVO                 12
+#define CLK_PIX_HDMI            13
+#define CLK_TMDS_HDMI           14
+#define CLK_REF_HDMIPHY         15
+
+/* CLOCKGEN D3 */
+#define CLK_STFE_FRC1           0
+#define CLK_TSOUT_0             1
+#define CLK_TSOUT_1             2
+#define CLK_MCHI                3
+#define CLK_VSENS_COMPO         4
+#define CLK_FRC1_REMOTE         5
+#define CLK_LPC_0               6
+#define CLK_LPC_1               7
+#endif
diff --git a/include/dt-bindings/clock/stih410-clks.h b/include/dt-bindings/clock/stih410-clks.h
new file mode 100644
index 000000000000..2097a4bbe155
--- /dev/null
+++ b/include/dt-bindings/clock/stih410-clks.h
@@ -0,0 +1,25 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH410 SoC.
+ */
+#ifndef _DT_BINDINGS_CLK_STIH410
+#define _DT_BINDINGS_CLK_STIH410
+
+#include "stih407-clks.h"
+
+/* STiH410 introduces new clock outputs compared to STiH407 */
+
+/* CLOCKGEN C0 */
+#define CLK_TX_ICN_HADES        32
+#define CLK_RX_ICN_HADES        33
+#define CLK_ICN_REG_16          34
+#define CLK_PP_HADES            35
+#define CLK_CLUST_HADES         36
+#define CLK_HWPE_HADES          37
+#define CLK_FC_HADES            38
+
+/* CLOCKGEN D0 */
+#define CLK_PCMR10_MASTER       4
+#define CLK_USB2_PHY            5
+
+#endif