aboutsummaryrefslogtreecommitdiffstats
path: root/include/dt-bindings/clock/exynos5440.h
diff options
context:
space:
mode:
authorIngo Molnar <mingo@kernel.org>2014-02-02 03:43:20 -0500
committerIngo Molnar <mingo@kernel.org>2014-02-02 03:43:20 -0500
commit65370bdf881e20907e7a53abab9b8c0bc5f60a6b (patch)
tree0d32a494e873b7b92dbfab0e67ffeef597ee8108 /include/dt-bindings/clock/exynos5440.h
parente207552e64ea053a33e856828ad7915484911d06 (diff)
parent5cb480f6b488128140c940abff3c36f524a334a8 (diff)
Merge branch 'linus' into core/locking
Refresh the topic. Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'include/dt-bindings/clock/exynos5440.h')
-rw-r--r--include/dt-bindings/clock/exynos5440.h42
1 files changed, 42 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/exynos5440.h b/include/dt-bindings/clock/exynos5440.h
new file mode 100644
index 000000000000..70cd85077fa9
--- /dev/null
+++ b/include/dt-bindings/clock/exynos5440.h
@@ -0,0 +1,42 @@
1/*
2 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
3 * Author: Andrzej Haja <a.hajda-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * Device Tree binding constants for Exynos5440 clock controller.
10*/
11
12#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5440_H
13#define _DT_BINDINGS_CLOCK_EXYNOS_5440_H
14
15#define CLK_XTAL 1
16#define CLK_ARM_CLK 2
17#define CLK_SPI_BAUD 16
18#define CLK_PB0_250 17
19#define CLK_PR0_250 18
20#define CLK_PR1_250 19
21#define CLK_B_250 20
22#define CLK_B_125 21
23#define CLK_B_200 22
24#define CLK_SATA 23
25#define CLK_USB 24
26#define CLK_GMAC0 25
27#define CLK_CS250 26
28#define CLK_PB0_250_O 27
29#define CLK_PR0_250_O 28
30#define CLK_PR1_250_O 29
31#define CLK_B_250_O 30
32#define CLK_B_125_O 31
33#define CLK_B_200_O 32
34#define CLK_SATA_O 33
35#define CLK_USB_O 34
36#define CLK_GMAC0_O 35
37#define CLK_CS250_O 36
38
39/* must be greater than maximal clock id */
40#define CLK_NR_CLKS 37
41
42#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5440_H */