diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-10-20 18:09:17 -0400 |
---|---|---|
committer | Keith Packard <keithp@keithp.com> | 2011-10-21 02:22:01 -0400 |
commit | a60f0e38d72a5e24085d6e7e27a4cadc20ae268a (patch) | |
tree | 65dfb758c4b13423203aeb8535f547b5718cd256 /include/drm | |
parent | a2006cf5a7ad3463e7c1e9da2c4bc90499427558 (diff) |
drm/i915: add DP test request handling
DPCD 1.1+ adds some automated test infrastructure support. Add support
for reading the IRQ source and jumping to a test handling routine if
needed. Subsequent patches will handle particular tests; this patch
just ACKs any requested tests by default.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'include/drm')
-rw-r--r-- | include/drm/drm_dp_helper.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 2b1a3585f8d8..0d2f727e96be 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h | |||
@@ -153,6 +153,12 @@ | |||
153 | # define DP_PSR_CRC_VERIFICATION (1 << 2) | 153 | # define DP_PSR_CRC_VERIFICATION (1 << 2) |
154 | # define DP_PSR_FRAME_CAPTURE (1 << 3) | 154 | # define DP_PSR_FRAME_CAPTURE (1 << 3) |
155 | 155 | ||
156 | #define DP_DEVICE_SERVICE_IRQ_VECTOR 0x201 | ||
157 | # define DP_REMOTE_CONTROL_COMMAND_PENDING (1 << 0) | ||
158 | # define DP_AUTOMATED_TEST_REQUEST (1 << 1) | ||
159 | # define DP_CP_IRQ (1 << 2) | ||
160 | # define DP_SINK_SPECIFIC_IRQ (1 << 6) | ||
161 | |||
156 | #define DP_LANE0_1_STATUS 0x202 | 162 | #define DP_LANE0_1_STATUS 0x202 |
157 | #define DP_LANE2_3_STATUS 0x203 | 163 | #define DP_LANE2_3_STATUS 0x203 |
158 | # define DP_LANE_CR_DONE (1 << 0) | 164 | # define DP_LANE_CR_DONE (1 << 0) |
@@ -185,6 +191,25 @@ | |||
185 | # define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0 | 191 | # define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0 |
186 | # define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6 | 192 | # define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6 |
187 | 193 | ||
194 | #define DP_TEST_REQUEST 0x218 | ||
195 | # define DP_TEST_LINK_TRAINING (1 << 0) | ||
196 | # define DP_TEST_LINK_PATTERN (1 << 1) | ||
197 | # define DP_TEST_LINK_EDID_READ (1 << 2) | ||
198 | # define DP_TEST_LINK_PHY_TEST_PATTERN (1 << 3) /* DPCD >= 1.1 */ | ||
199 | |||
200 | #define DP_TEST_LINK_RATE 0x219 | ||
201 | # define DP_LINK_RATE_162 (0x6) | ||
202 | # define DP_LINK_RATE_27 (0xa) | ||
203 | |||
204 | #define DP_TEST_LANE_COUNT 0x220 | ||
205 | |||
206 | #define DP_TEST_PATTERN 0x221 | ||
207 | |||
208 | #define DP_TEST_RESPONSE 0x260 | ||
209 | # define DP_TEST_ACK (1 << 0) | ||
210 | # define DP_TEST_NAK (1 << 1) | ||
211 | # define DP_TEST_EDID_CHECKSUM_WRITE (1 << 2) | ||
212 | |||
188 | #define DP_SET_POWER 0x600 | 213 | #define DP_SET_POWER 0x600 |
189 | # define DP_SET_POWER_D0 0x1 | 214 | # define DP_SET_POWER_D0 0x1 |
190 | # define DP_SET_POWER_D3 0x2 | 215 | # define DP_SET_POWER_D3 0x2 |