aboutsummaryrefslogtreecommitdiffstats
path: root/include/drm
diff options
context:
space:
mode:
authorJani Nikula <jani.nikula@intel.com>2015-02-03 07:34:05 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-03-17 17:30:21 -0400
commit44e5e28bf64fcd7c4d3f933cb4c7f69d8aa11781 (patch)
tree9ec2983cc38dc7f00ed0498b3e91254d4f446a82 /include/drm
parentf4998963f2fbd4a22ae77624bc810b21208a8803 (diff)
drm/i915: remove indirection in the PCI ID macros
Spell all the PCI IDs out to be able to quickly grep for the IDs. No functional changes. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> [danvet: Add GT1/2 to comments to not loose that distinction.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/i915_pciids.h49
1 files changed, 25 insertions, 24 deletions
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index f2e47fd56751..613372375ada 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -208,40 +208,41 @@
208#define INTEL_VLV_D_IDS(info) \ 208#define INTEL_VLV_D_IDS(info) \
209 INTEL_VGA_DEVICE(0x0155, info) 209 INTEL_VGA_DEVICE(0x0155, info)
210 210
211#define _INTEL_BDW_M(gt, id, info) \ 211#define INTEL_BDW_GT12M_IDS(info) \
212 INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) 212 INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
213#define _INTEL_BDW_D(gt, id, info) \ 213 INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
214 INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) 214 INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
215 215 INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
216#define _INTEL_BDW_M_IDS(gt, info) \ 216 INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
217 _INTEL_BDW_M(gt, 0x1602, info), /* Halo */ \ 217 INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
218 _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \ 218 INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
219 _INTEL_BDW_M(gt, 0x160B, info), /* ULT */ \ 219 INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
220 _INTEL_BDW_M(gt, 0x160E, info) /* ULX */
221
222#define _INTEL_BDW_D_IDS(gt, info) \
223 _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \
224 _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */
225
226#define INTEL_BDW_GT12M_IDS(info) \
227 _INTEL_BDW_M_IDS(1, info), \
228 _INTEL_BDW_M_IDS(2, info)
229 220
230#define INTEL_BDW_GT12D_IDS(info) \ 221#define INTEL_BDW_GT12D_IDS(info) \
231 _INTEL_BDW_D_IDS(1, info), \ 222 INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
232 _INTEL_BDW_D_IDS(2, info) 223 INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \
224 INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
225 INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */
233 226
234#define INTEL_BDW_GT3M_IDS(info) \ 227#define INTEL_BDW_GT3M_IDS(info) \
235 _INTEL_BDW_M_IDS(3, info) 228 INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
229 INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
230 INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
231 INTEL_VGA_DEVICE(0x162E, info) /* ULX */
236 232
237#define INTEL_BDW_GT3D_IDS(info) \ 233#define INTEL_BDW_GT3D_IDS(info) \
238 _INTEL_BDW_D_IDS(3, info) 234 INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
235 INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
239 236
240#define INTEL_BDW_RSVDM_IDS(info) \ 237#define INTEL_BDW_RSVDM_IDS(info) \
241 _INTEL_BDW_M_IDS(4, info) 238 INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
239 INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
240 INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
241 INTEL_VGA_DEVICE(0x163E, info) /* ULX */
242 242
243#define INTEL_BDW_RSVDD_IDS(info) \ 243#define INTEL_BDW_RSVDD_IDS(info) \
244 _INTEL_BDW_D_IDS(4, info) 244 INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
245 INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
245 246
246#define INTEL_BDW_M_IDS(info) \ 247#define INTEL_BDW_M_IDS(info) \
247 INTEL_BDW_GT12M_IDS(info), \ 248 INTEL_BDW_GT12M_IDS(info), \