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authorDave Airlie <airlied@redhat.com>2012-05-22 05:39:57 -0400
committerDave Airlie <airlied@redhat.com>2012-05-22 05:39:57 -0400
commit345f3b9035691d2d6e97398039b99fa484653cc4 (patch)
tree5918971695857c8d424a8a7e05ed642604d132ae /include/drm
parentebe0f2442cc4c5493a85c875d2d8a44ffecc1175 (diff)
parentd7f1642c90ab5eb2d7c48af0581c993094f97e1a (diff)
Merge branch 'exynos-drm-next' of git://git.infradead.org/users/kmpark/linux-samsung into drm-core-next
* 'exynos-drm-next' of git://git.infradead.org/users/kmpark/linux-samsung: drm/exynos: add G2D driver drm/exynos: added vp scaling feature for hdmi drm/exynos: added source size to overlay structure drm/exynos: add additional display mode for hdmi drm/exynos: enable dvi mode for dvi monitor drm/exynos: fixed wrong pageflip finish event for interlace mode drm/exynos: add PM functions for hdmi and mixer drm/exynos: add dpms for hdmi drm/exynos: use threaded irq for hdmi hotplug drm/exynos: use platform_get_irq_byname for hdmi drm/exynos: cleanup for hdmi platform data drm/exynos: added a feature to get gem buffer information. drm/exynos: added drm prime feature. drm/exynos: added cache attribute support for gem. vgaarb: Provide dummy default device functions
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/exynos_drm.h99
1 files changed, 91 insertions, 8 deletions
diff --git a/include/drm/exynos_drm.h b/include/drm/exynos_drm.h
index e478de4e5d56..b6d7ce92eadd 100644
--- a/include/drm/exynos_drm.h
+++ b/include/drm/exynos_drm.h
@@ -29,6 +29,8 @@
29#ifndef _EXYNOS_DRM_H_ 29#ifndef _EXYNOS_DRM_H_
30#define _EXYNOS_DRM_H_ 30#define _EXYNOS_DRM_H_
31 31
32#include "drm.h"
33
32/** 34/**
33 * User-desired buffer creation information structure. 35 * User-desired buffer creation information structure.
34 * 36 *
@@ -75,6 +77,21 @@ struct drm_exynos_gem_mmap {
75}; 77};
76 78
77/** 79/**
80 * A structure to gem information.
81 *
82 * @handle: a handle to gem object created.
83 * @flags: flag value including memory type and cache attribute and
84 * this value would be set by driver.
85 * @size: size to memory region allocated by gem and this size would
86 * be set by driver.
87 */
88struct drm_exynos_gem_info {
89 unsigned int handle;
90 unsigned int flags;
91 uint64_t size;
92};
93
94/**
78 * A structure for user connection request of virtual display. 95 * A structure for user connection request of virtual display.
79 * 96 *
80 * @connection: indicate whether doing connetion or not by user. 97 * @connection: indicate whether doing connetion or not by user.
@@ -95,18 +112,64 @@ struct drm_exynos_plane_set_zpos {
95 112
96/* memory type definitions. */ 113/* memory type definitions. */
97enum e_drm_exynos_gem_mem_type { 114enum e_drm_exynos_gem_mem_type {
115 /* Physically Continuous memory and used as default. */
116 EXYNOS_BO_CONTIG = 0 << 0,
98 /* Physically Non-Continuous memory. */ 117 /* Physically Non-Continuous memory. */
99 EXYNOS_BO_NONCONTIG = 1 << 0, 118 EXYNOS_BO_NONCONTIG = 1 << 0,
100 EXYNOS_BO_MASK = EXYNOS_BO_NONCONTIG 119 /* non-cachable mapping and used as default. */
120 EXYNOS_BO_NONCACHABLE = 0 << 1,
121 /* cachable mapping. */
122 EXYNOS_BO_CACHABLE = 1 << 1,
123 /* write-combine mapping. */
124 EXYNOS_BO_WC = 1 << 2,
125 EXYNOS_BO_MASK = EXYNOS_BO_NONCONTIG | EXYNOS_BO_CACHABLE |
126 EXYNOS_BO_WC
127};
128
129struct drm_exynos_g2d_get_ver {
130 __u32 major;
131 __u32 minor;
132};
133
134struct drm_exynos_g2d_cmd {
135 __u32 offset;
136 __u32 data;
137};
138
139enum drm_exynos_g2d_event_type {
140 G2D_EVENT_NOT,
141 G2D_EVENT_NONSTOP,
142 G2D_EVENT_STOP, /* not yet */
143};
144
145struct drm_exynos_g2d_set_cmdlist {
146 __u64 cmd;
147 __u64 cmd_gem;
148 __u32 cmd_nr;
149 __u32 cmd_gem_nr;
150
151 /* for g2d event */
152 __u64 event_type;
153 __u64 user_data;
154};
155
156struct drm_exynos_g2d_exec {
157 __u64 async;
101}; 158};
102 159
103#define DRM_EXYNOS_GEM_CREATE 0x00 160#define DRM_EXYNOS_GEM_CREATE 0x00
104#define DRM_EXYNOS_GEM_MAP_OFFSET 0x01 161#define DRM_EXYNOS_GEM_MAP_OFFSET 0x01
105#define DRM_EXYNOS_GEM_MMAP 0x02 162#define DRM_EXYNOS_GEM_MMAP 0x02
106/* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */ 163/* Reserved 0x03 ~ 0x05 for exynos specific gem ioctl */
164#define DRM_EXYNOS_GEM_GET 0x04
107#define DRM_EXYNOS_PLANE_SET_ZPOS 0x06 165#define DRM_EXYNOS_PLANE_SET_ZPOS 0x06
108#define DRM_EXYNOS_VIDI_CONNECTION 0x07 166#define DRM_EXYNOS_VIDI_CONNECTION 0x07
109 167
168/* G2D */
169#define DRM_EXYNOS_G2D_GET_VER 0x20
170#define DRM_EXYNOS_G2D_SET_CMDLIST 0x21
171#define DRM_EXYNOS_G2D_EXEC 0x22
172
110#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \ 173#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
111 DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create) 174 DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
112 175
@@ -116,12 +179,34 @@ enum e_drm_exynos_gem_mem_type {
116#define DRM_IOCTL_EXYNOS_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + \ 179#define DRM_IOCTL_EXYNOS_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + \
117 DRM_EXYNOS_GEM_MMAP, struct drm_exynos_gem_mmap) 180 DRM_EXYNOS_GEM_MMAP, struct drm_exynos_gem_mmap)
118 181
182#define DRM_IOCTL_EXYNOS_GEM_GET DRM_IOWR(DRM_COMMAND_BASE + \
183 DRM_EXYNOS_GEM_GET, struct drm_exynos_gem_info)
184
119#define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \ 185#define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \
120 DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos) 186 DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos)
121 187
122#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \ 188#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \
123 DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection) 189 DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)
124 190
191#define DRM_IOCTL_EXYNOS_G2D_GET_VER DRM_IOWR(DRM_COMMAND_BASE + \
192 DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver)
193#define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \
194 DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist)
195#define DRM_IOCTL_EXYNOS_G2D_EXEC DRM_IOWR(DRM_COMMAND_BASE + \
196 DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
197
198/* EXYNOS specific events */
199#define DRM_EXYNOS_G2D_EVENT 0x80000000
200
201struct drm_exynos_g2d_event {
202 struct drm_event base;
203 __u64 user_data;
204 __u32 tv_sec;
205 __u32 tv_usec;
206 __u32 cmdlist_no;
207 __u32 reserved;
208};
209
125#ifdef __KERNEL__ 210#ifdef __KERNEL__
126 211
127/** 212/**
@@ -169,16 +254,14 @@ struct exynos_drm_common_hdmi_pd {
169/** 254/**
170 * Platform Specific Structure for DRM based HDMI core. 255 * Platform Specific Structure for DRM based HDMI core.
171 * 256 *
172 * @timing: default video mode for initializing
173 * @default_win: default window layer number to be used for UI.
174 * @bpp: default bit per pixel.
175 * @is_v13: set if hdmi version 13 is. 257 * @is_v13: set if hdmi version 13 is.
258 * @cfg_hpd: function pointer to configure hdmi hotplug detection pin
259 * @get_hpd: function pointer to get value of hdmi hotplug detection pin
176 */ 260 */
177struct exynos_drm_hdmi_pdata { 261struct exynos_drm_hdmi_pdata {
178 struct fb_videomode timing; 262 bool is_v13;
179 unsigned int default_win; 263 void (*cfg_hpd)(bool external);
180 unsigned int bpp; 264 int (*get_hpd)(void);
181 unsigned int is_v13:1;
182}; 265};
183 266
184#endif /* __KERNEL__ */ 267#endif /* __KERNEL__ */