diff options
author | David S. Miller <davem@davemloft.net> | 2009-05-19 00:08:20 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-05-19 00:08:20 -0400 |
commit | bb803cfbecb03a0cf8dc7e1864f18dda6631af00 (patch) | |
tree | 6c0989693bea6f50cfa5c6bb14f52ec19668def3 /include/drm | |
parent | 3878fb6fdbceecca20b15748f807340854220f06 (diff) | |
parent | 511e11e396dc596825ce04d53d7f6d579404bc01 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/scsi/fcoe/fcoe.c
Diffstat (limited to 'include/drm')
-rw-r--r-- | include/drm/drm_pciids.h | 3 | ||||
-rw-r--r-- | include/drm/i915_drm.h | 13 |
2 files changed, 16 insertions, 0 deletions
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h index 2df74eb09563..fc55db780199 100644 --- a/include/drm/drm_pciids.h +++ b/include/drm/drm_pciids.h | |||
@@ -472,6 +472,7 @@ | |||
472 | {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | 472 | {0x8086, 0x2562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ |
473 | {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | 473 | {0x8086, 0x3582, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ |
474 | {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | 474 | {0x8086, 0x2572, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ |
475 | {0x8086, 0x358e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \ | ||
475 | {0, 0, 0} | 476 | {0, 0, 0} |
476 | 477 | ||
477 | #define gamma_PCI_IDS \ | 478 | #define gamma_PCI_IDS \ |
@@ -531,6 +532,8 @@ | |||
531 | {0x8086, 0x2e02, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | 532 | {0x8086, 0x2e02, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ |
532 | {0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | 533 | {0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ |
533 | {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | 534 | {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ |
535 | {0x8086, 0x2e32, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | ||
534 | {0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | 536 | {0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ |
535 | {0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | 537 | {0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ |
538 | {0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \ | ||
536 | {0, 0, 0} | 539 | {0, 0, 0} |
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 67e3353a56d6..8e1e92583fbc 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h | |||
@@ -184,6 +184,7 @@ typedef struct _drm_i915_sarea { | |||
184 | #define DRM_I915_GEM_GET_TILING 0x22 | 184 | #define DRM_I915_GEM_GET_TILING 0x22 |
185 | #define DRM_I915_GEM_GET_APERTURE 0x23 | 185 | #define DRM_I915_GEM_GET_APERTURE 0x23 |
186 | #define DRM_I915_GEM_MMAP_GTT 0x24 | 186 | #define DRM_I915_GEM_MMAP_GTT 0x24 |
187 | #define DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25 | ||
187 | 188 | ||
188 | #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) | 189 | #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) |
189 | #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) | 190 | #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) |
@@ -219,6 +220,7 @@ typedef struct _drm_i915_sarea { | |||
219 | #define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling) | 220 | #define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling) |
220 | #define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling) | 221 | #define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling) |
221 | #define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture) | 222 | #define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture) |
223 | #define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_intel_get_pipe_from_crtc_id) | ||
222 | 224 | ||
223 | /* Allow drivers to submit batchbuffers directly to hardware, relying | 225 | /* Allow drivers to submit batchbuffers directly to hardware, relying |
224 | * on the security mechanisms provided by hardware. | 226 | * on the security mechanisms provided by hardware. |
@@ -594,6 +596,9 @@ struct drm_i915_gem_busy { | |||
594 | #define I915_BIT_6_SWIZZLE_9_10_11 4 | 596 | #define I915_BIT_6_SWIZZLE_9_10_11 4 |
595 | /* Not seen by userland */ | 597 | /* Not seen by userland */ |
596 | #define I915_BIT_6_SWIZZLE_UNKNOWN 5 | 598 | #define I915_BIT_6_SWIZZLE_UNKNOWN 5 |
599 | /* Seen by userland. */ | ||
600 | #define I915_BIT_6_SWIZZLE_9_17 6 | ||
601 | #define I915_BIT_6_SWIZZLE_9_10_17 7 | ||
597 | 602 | ||
598 | struct drm_i915_gem_set_tiling { | 603 | struct drm_i915_gem_set_tiling { |
599 | /** Handle of the buffer to have its tiling state updated */ | 604 | /** Handle of the buffer to have its tiling state updated */ |
@@ -654,4 +659,12 @@ struct drm_i915_gem_get_aperture { | |||
654 | __u64 aper_available_size; | 659 | __u64 aper_available_size; |
655 | }; | 660 | }; |
656 | 661 | ||
662 | struct drm_i915_get_pipe_from_crtc_id { | ||
663 | /** ID of CRTC being requested **/ | ||
664 | __u32 crtc_id; | ||
665 | |||
666 | /** pipe of requested CRTC **/ | ||
667 | __u32 pipe; | ||
668 | }; | ||
669 | |||
657 | #endif /* _I915_DRM_H_ */ | 670 | #endif /* _I915_DRM_H_ */ |