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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-11-06 06:18:58 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-23 15:14:47 -0500
commit4080775b60cc26044e7c4aba5e76e5041b0d7004 (patch)
tree46ee73a35bb1c99ff7e075e1c9b441faad98dc94 /include/drm
parent7c2e6fdf452cddeff6a8ee5156edba39e53246fc (diff)
intel-gtt: export api for drm/i915
Just some minor shuffling to get rid of any agp traces in the exported functions. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/intel-gtt.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/drm/intel-gtt.h b/include/drm/intel-gtt.h
index c35817a11690..9e343c0998b4 100644
--- a/include/drm/intel-gtt.h
+++ b/include/drm/intel-gtt.h
@@ -11,9 +11,21 @@ const struct intel_gtt {
11 /* Part of the gtt that is mappable by the cpu, for those chips where 11 /* Part of the gtt that is mappable by the cpu, for those chips where
12 * this is not the full gtt. */ 12 * this is not the full gtt. */
13 unsigned int gtt_mappable_entries; 13 unsigned int gtt_mappable_entries;
14 /* Whether i915 needs to use the dmar apis or not. */
15 unsigned int needs_dmar : 1;
14} *intel_gtt_get(void); 16} *intel_gtt_get(void);
15 17
16void intel_gtt_chipset_flush(void); 18void intel_gtt_chipset_flush(void);
19void intel_gtt_unmap_memory(struct scatterlist *sg_list, int num_sg);
20void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
21int intel_gtt_map_memory(struct page **pages, unsigned int num_entries,
22 struct scatterlist **sg_list, int *num_sg);
23void intel_gtt_insert_sg_entries(struct scatterlist *sg_list,
24 unsigned int sg_len,
25 unsigned int pg_start,
26 unsigned int flags);
27void intel_gtt_insert_pages(unsigned int first_entry, unsigned int num_entries,
28 struct page **pages, unsigned int flags);
17 29
18/* Special gtt memory types */ 30/* Special gtt memory types */
19#define AGP_DCACHE_MEMORY 1 31#define AGP_DCACHE_MEMORY 1