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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-23 12:47:25 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-23 12:47:25 -0500 |
commit | 2d0f2400a49be3a177695eda381d91fec18cbd0e (patch) | |
tree | 312234f4144e7626aa49a678e13f4e8361884260 /include/drm/radeon_drm.h | |
parent | b4bbb02934e4511d9083f15c23e90703482e84ad (diff) | |
parent | a5cd335165e31db9dbab636fd29895d41da55dd2 (diff) |
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (31 commits)
drm: integer overflow in drm_mode_dirtyfb_ioctl()
drivers/gpu/vga/vgaarb.c: add missing kfree
drm/radeon/kms/atom: unify i2c gpio table handling
drm/radeon/kms: fix up gpio i2c mask bits for r4xx for real
ttm: Don't return the bo reserved on error path
drm/radeon/kms: add a CS ioctl flag not to rewrite tiling flags in the CS
drm/i915: Fix inconsistent backlight level during disabled
drm, i915: Fix memory leak in i915_gem_busy_ioctl().
drm/i915: Use DPCD value for max DP lanes.
drm/i915: Initiate DP link training only on the lanes we'll be using
drm/i915: Remove trailing white space
drm/i915: Try harder during dp pattern 1 link training
drm/i915: Make DP prepare/commit consistent with DP dpms
drm/i915: Let panel power sequencing hardware do its job
drm/i915: Treat PCH eDP like DP in most places
drm/i915: Remove link_status field from intel_dp structure
drm/i915: Move common PCH_PP_CONTROL setup to ironlake_get_pp_control
drm/i915: Module parameters using '-1' as default must be signed type
drm/i915: Turn on another required clock gating bit on gen6.
drm/i915: Turn on a required 3D clock gating bit on Sandybridge.
...
Diffstat (limited to 'include/drm/radeon_drm.h')
-rw-r--r-- | include/drm/radeon_drm.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h index b65be6054a18..be94be6d6f17 100644 --- a/include/drm/radeon_drm.h +++ b/include/drm/radeon_drm.h | |||
@@ -874,6 +874,10 @@ struct drm_radeon_gem_pwrite { | |||
874 | 874 | ||
875 | #define RADEON_CHUNK_ID_RELOCS 0x01 | 875 | #define RADEON_CHUNK_ID_RELOCS 0x01 |
876 | #define RADEON_CHUNK_ID_IB 0x02 | 876 | #define RADEON_CHUNK_ID_IB 0x02 |
877 | #define RADEON_CHUNK_ID_FLAGS 0x03 | ||
878 | |||
879 | /* The first dword of RADEON_CHUNK_ID_FLAGS is a uint32 of these flags: */ | ||
880 | #define RADEON_CS_KEEP_TILING_FLAGS 0x01 | ||
877 | 881 | ||
878 | struct drm_radeon_cs_chunk { | 882 | struct drm_radeon_cs_chunk { |
879 | uint32_t chunk_id; | 883 | uint32_t chunk_id; |