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authorIngo Molnar <mingo@elte.hu>2009-08-11 08:19:09 -0400
committerIngo Molnar <mingo@elte.hu>2009-08-11 08:19:09 -0400
commit89034bc2c7b839702c00a704e79d112737f98be0 (patch)
treee65b1f3d4c751baa840efc81bc4734f089379eb3 /include/drm/radeon_drm.h
parentfb82ad719831db58e9baa4c67015aae3fe27e7e3 (diff)
parent85dfd81dc57e8183a277ddd7a56aa65c96f3f487 (diff)
Merge branch 'linus' into tracing/core
Conflicts: kernel/trace/trace_events_filter.c We use the tracing/core version. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/drm/radeon_drm.h')
-rw-r--r--include/drm/radeon_drm.h23
1 files changed, 22 insertions, 1 deletions
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index 41862e9a4c20..af4b4826997e 100644
--- a/include/drm/radeon_drm.h
+++ b/include/drm/radeon_drm.h
@@ -506,6 +506,8 @@ typedef struct {
506#define DRM_RADEON_GEM_WAIT_IDLE 0x24 506#define DRM_RADEON_GEM_WAIT_IDLE 0x24
507#define DRM_RADEON_CS 0x26 507#define DRM_RADEON_CS 0x26
508#define DRM_RADEON_INFO 0x27 508#define DRM_RADEON_INFO 0x27
509#define DRM_RADEON_GEM_SET_TILING 0x28
510#define DRM_RADEON_GEM_GET_TILING 0x29
509 511
510#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t) 512#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
511#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START) 513#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
@@ -544,7 +546,8 @@ typedef struct {
544#define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle) 546#define DRM_IOCTL_RADEON_GEM_WAIT_IDLE DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_IDLE, struct drm_radeon_gem_wait_idle)
545#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs) 547#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs)
546#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info) 548#define DRM_IOCTL_RADEON_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_INFO, struct drm_radeon_info)
547 549#define DRM_IOCTL_RADEON_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_TILING, struct drm_radeon_gem_set_tiling)
550#define DRM_IOCTL_RADEON_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_GET_TILING, struct drm_radeon_gem_get_tiling)
548 551
549typedef struct drm_radeon_init { 552typedef struct drm_radeon_init {
550 enum { 553 enum {
@@ -796,6 +799,24 @@ struct drm_radeon_gem_create {
796 uint32_t flags; 799 uint32_t flags;
797}; 800};
798 801
802#define RADEON_TILING_MACRO 0x1
803#define RADEON_TILING_MICRO 0x2
804#define RADEON_TILING_SWAP 0x4
805#define RADEON_TILING_SURFACE 0x8 /* this object requires a surface
806 * when mapped - i.e. front buffer */
807
808struct drm_radeon_gem_set_tiling {
809 uint32_t handle;
810 uint32_t tiling_flags;
811 uint32_t pitch;
812};
813
814struct drm_radeon_gem_get_tiling {
815 uint32_t handle;
816 uint32_t tiling_flags;
817 uint32_t pitch;
818};
819
799struct drm_radeon_gem_mmap { 820struct drm_radeon_gem_mmap {
800 uint32_t handle; 821 uint32_t handle;
801 uint32_t pad; 822 uint32_t pad;