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authorArnd Bergmann <arnd@arndb.de>2009-02-25 18:51:42 -0500
committerIngo Molnar <mingo@elte.hu>2009-03-26 13:14:18 -0400
commit1d7f83d5ad6c30b385ba549c1c3a287cc872b7ae (patch)
tree05c11fb255f01d4f81839204fd31f1283030b496 /include/drm/i915_drm.h
parentccef7ab534347e2e1e1ef398d2ec987d37e519f3 (diff)
make drm headers use strict integer types
The drm headers are traditionally shared with BSD and could not use the strict linux integer types. This is over now, so we can use our own types now. Cc: David Airlie <airlied@linux.ie> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/drm/i915_drm.h')
-rw-r--r--include/drm/i915_drm.h140
1 files changed, 70 insertions, 70 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index b3bcf72dc656..641b9b210d3c 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -30,7 +30,7 @@
30/* Please note that modifications to all structs defined here are 30/* Please note that modifications to all structs defined here are
31 * subject to backwards-compatibility constraints. 31 * subject to backwards-compatibility constraints.
32 */ 32 */
33 33#include <linux/types.h>
34#include "drm.h" 34#include "drm.h"
35 35
36/* Each region is a minimum of 16k, and there are at most 255 of them. 36/* Each region is a minimum of 16k, and there are at most 255 of them.
@@ -116,15 +116,15 @@ typedef struct _drm_i915_sarea {
116 116
117 /* fill out some space for old userspace triple buffer */ 117 /* fill out some space for old userspace triple buffer */
118 drm_handle_t unused_handle; 118 drm_handle_t unused_handle;
119 uint32_t unused1, unused2, unused3; 119 __u32 unused1, unused2, unused3;
120 120
121 /* buffer object handles for static buffers. May change 121 /* buffer object handles for static buffers. May change
122 * over the lifetime of the client. 122 * over the lifetime of the client.
123 */ 123 */
124 uint32_t front_bo_handle; 124 __u32 front_bo_handle;
125 uint32_t back_bo_handle; 125 __u32 back_bo_handle;
126 uint32_t unused_bo_handle; 126 __u32 unused_bo_handle;
127 uint32_t depth_bo_handle; 127 __u32 depth_bo_handle;
128 128
129} drm_i915_sarea_t; 129} drm_i915_sarea_t;
130 130
@@ -325,7 +325,7 @@ typedef struct drm_i915_vblank_swap {
325} drm_i915_vblank_swap_t; 325} drm_i915_vblank_swap_t;
326 326
327typedef struct drm_i915_hws_addr { 327typedef struct drm_i915_hws_addr {
328 uint64_t addr; 328 __u64 addr;
329} drm_i915_hws_addr_t; 329} drm_i915_hws_addr_t;
330 330
331struct drm_i915_gem_init { 331struct drm_i915_gem_init {
@@ -333,12 +333,12 @@ struct drm_i915_gem_init {
333 * Beginning offset in the GTT to be managed by the DRM memory 333 * Beginning offset in the GTT to be managed by the DRM memory
334 * manager. 334 * manager.
335 */ 335 */
336 uint64_t gtt_start; 336 __u64 gtt_start;
337 /** 337 /**
338 * Ending offset in the GTT to be managed by the DRM memory 338 * Ending offset in the GTT to be managed by the DRM memory
339 * manager. 339 * manager.
340 */ 340 */
341 uint64_t gtt_end; 341 __u64 gtt_end;
342}; 342};
343 343
344struct drm_i915_gem_create { 344struct drm_i915_gem_create {
@@ -347,94 +347,94 @@ struct drm_i915_gem_create {
347 * 347 *
348 * The (page-aligned) allocated size for the object will be returned. 348 * The (page-aligned) allocated size for the object will be returned.
349 */ 349 */
350 uint64_t size; 350 __u64 size;
351 /** 351 /**
352 * Returned handle for the object. 352 * Returned handle for the object.
353 * 353 *
354 * Object handles are nonzero. 354 * Object handles are nonzero.
355 */ 355 */
356 uint32_t handle; 356 __u32 handle;
357 uint32_t pad; 357 __u32 pad;
358}; 358};
359 359
360struct drm_i915_gem_pread { 360struct drm_i915_gem_pread {
361 /** Handle for the object being read. */ 361 /** Handle for the object being read. */
362 uint32_t handle; 362 __u32 handle;
363 uint32_t pad; 363 __u32 pad;
364 /** Offset into the object to read from */ 364 /** Offset into the object to read from */
365 uint64_t offset; 365 __u64 offset;
366 /** Length of data to read */ 366 /** Length of data to read */
367 uint64_t size; 367 __u64 size;
368 /** 368 /**
369 * Pointer to write the data into. 369 * Pointer to write the data into.
370 * 370 *
371 * This is a fixed-size type for 32/64 compatibility. 371 * This is a fixed-size type for 32/64 compatibility.
372 */ 372 */
373 uint64_t data_ptr; 373 __u64 data_ptr;
374}; 374};
375 375
376struct drm_i915_gem_pwrite { 376struct drm_i915_gem_pwrite {
377 /** Handle for the object being written to. */ 377 /** Handle for the object being written to. */
378 uint32_t handle; 378 __u32 handle;
379 uint32_t pad; 379 __u32 pad;
380 /** Offset into the object to write to */ 380 /** Offset into the object to write to */
381 uint64_t offset; 381 __u64 offset;
382 /** Length of data to write */ 382 /** Length of data to write */
383 uint64_t size; 383 __u64 size;
384 /** 384 /**
385 * Pointer to read the data from. 385 * Pointer to read the data from.
386 * 386 *
387 * This is a fixed-size type for 32/64 compatibility. 387 * This is a fixed-size type for 32/64 compatibility.
388 */ 388 */
389 uint64_t data_ptr; 389 __u64 data_ptr;
390}; 390};
391 391
392struct drm_i915_gem_mmap { 392struct drm_i915_gem_mmap {
393 /** Handle for the object being mapped. */ 393 /** Handle for the object being mapped. */
394 uint32_t handle; 394 __u32 handle;
395 uint32_t pad; 395 __u32 pad;
396 /** Offset in the object to map. */ 396 /** Offset in the object to map. */
397 uint64_t offset; 397 __u64 offset;
398 /** 398 /**
399 * Length of data to map. 399 * Length of data to map.
400 * 400 *
401 * The value will be page-aligned. 401 * The value will be page-aligned.
402 */ 402 */
403 uint64_t size; 403 __u64 size;
404 /** 404 /**
405 * Returned pointer the data was mapped at. 405 * Returned pointer the data was mapped at.
406 * 406 *
407 * This is a fixed-size type for 32/64 compatibility. 407 * This is a fixed-size type for 32/64 compatibility.
408 */ 408 */
409 uint64_t addr_ptr; 409 __u64 addr_ptr;
410}; 410};
411 411
412struct drm_i915_gem_mmap_gtt { 412struct drm_i915_gem_mmap_gtt {
413 /** Handle for the object being mapped. */ 413 /** Handle for the object being mapped. */
414 uint32_t handle; 414 __u32 handle;
415 uint32_t pad; 415 __u32 pad;
416 /** 416 /**
417 * Fake offset to use for subsequent mmap call 417 * Fake offset to use for subsequent mmap call
418 * 418 *
419 * This is a fixed-size type for 32/64 compatibility. 419 * This is a fixed-size type for 32/64 compatibility.
420 */ 420 */
421 uint64_t offset; 421 __u64 offset;
422}; 422};
423 423
424struct drm_i915_gem_set_domain { 424struct drm_i915_gem_set_domain {
425 /** Handle for the object */ 425 /** Handle for the object */
426 uint32_t handle; 426 __u32 handle;
427 427
428 /** New read domains */ 428 /** New read domains */
429 uint32_t read_domains; 429 __u32 read_domains;
430 430
431 /** New write domain */ 431 /** New write domain */
432 uint32_t write_domain; 432 __u32 write_domain;
433}; 433};
434 434
435struct drm_i915_gem_sw_finish { 435struct drm_i915_gem_sw_finish {
436 /** Handle for the object */ 436 /** Handle for the object */
437 uint32_t handle; 437 __u32 handle;
438}; 438};
439 439
440struct drm_i915_gem_relocation_entry { 440struct drm_i915_gem_relocation_entry {
@@ -446,16 +446,16 @@ struct drm_i915_gem_relocation_entry {
446 * a relocation list for state buffers and not re-write it per 446 * a relocation list for state buffers and not re-write it per
447 * exec using the buffer. 447 * exec using the buffer.
448 */ 448 */
449 uint32_t target_handle; 449 __u32 target_handle;
450 450
451 /** 451 /**
452 * Value to be added to the offset of the target buffer to make up 452 * Value to be added to the offset of the target buffer to make up
453 * the relocation entry. 453 * the relocation entry.
454 */ 454 */
455 uint32_t delta; 455 __u32 delta;
456 456
457 /** Offset in the buffer the relocation entry will be written into */ 457 /** Offset in the buffer the relocation entry will be written into */
458 uint64_t offset; 458 __u64 offset;
459 459
460 /** 460 /**
461 * Offset value of the target buffer that the relocation entry was last 461 * Offset value of the target buffer that the relocation entry was last
@@ -465,12 +465,12 @@ struct drm_i915_gem_relocation_entry {
465 * and writing the relocation. This value is written back out by 465 * and writing the relocation. This value is written back out by
466 * the execbuffer ioctl when the relocation is written. 466 * the execbuffer ioctl when the relocation is written.
467 */ 467 */
468 uint64_t presumed_offset; 468 __u64 presumed_offset;
469 469
470 /** 470 /**
471 * Target memory domains read by this operation. 471 * Target memory domains read by this operation.
472 */ 472 */
473 uint32_t read_domains; 473 __u32 read_domains;
474 474
475 /** 475 /**
476 * Target memory domains written by this operation. 476 * Target memory domains written by this operation.
@@ -479,7 +479,7 @@ struct drm_i915_gem_relocation_entry {
479 * execbuffer operation, so that where there are conflicts, 479 * execbuffer operation, so that where there are conflicts,
480 * the application will get -EINVAL back. 480 * the application will get -EINVAL back.
481 */ 481 */
482 uint32_t write_domain; 482 __u32 write_domain;
483}; 483};
484 484
485/** @{ 485/** @{
@@ -510,24 +510,24 @@ struct drm_i915_gem_exec_object {
510 * User's handle for a buffer to be bound into the GTT for this 510 * User's handle for a buffer to be bound into the GTT for this
511 * operation. 511 * operation.
512 */ 512 */
513 uint32_t handle; 513 __u32 handle;
514 514
515 /** Number of relocations to be performed on this buffer */ 515 /** Number of relocations to be performed on this buffer */
516 uint32_t relocation_count; 516 __u32 relocation_count;
517 /** 517 /**
518 * Pointer to array of struct drm_i915_gem_relocation_entry containing 518 * Pointer to array of struct drm_i915_gem_relocation_entry containing
519 * the relocations to be performed in this buffer. 519 * the relocations to be performed in this buffer.
520 */ 520 */
521 uint64_t relocs_ptr; 521 __u64 relocs_ptr;
522 522
523 /** Required alignment in graphics aperture */ 523 /** Required alignment in graphics aperture */
524 uint64_t alignment; 524 __u64 alignment;
525 525
526 /** 526 /**
527 * Returned value of the updated offset of the object, for future 527 * Returned value of the updated offset of the object, for future
528 * presumed_offset writes. 528 * presumed_offset writes.
529 */ 529 */
530 uint64_t offset; 530 __u64 offset;
531}; 531};
532 532
533struct drm_i915_gem_execbuffer { 533struct drm_i915_gem_execbuffer {
@@ -541,44 +541,44 @@ struct drm_i915_gem_execbuffer {
541 * a buffer is performing refer to buffers that have already appeared 541 * a buffer is performing refer to buffers that have already appeared
542 * in the validate list. 542 * in the validate list.
543 */ 543 */
544 uint64_t buffers_ptr; 544 __u64 buffers_ptr;
545 uint32_t buffer_count; 545 __u32 buffer_count;
546 546
547 /** Offset in the batchbuffer to start execution from. */ 547 /** Offset in the batchbuffer to start execution from. */
548 uint32_t batch_start_offset; 548 __u32 batch_start_offset;
549 /** Bytes used in batchbuffer from batch_start_offset */ 549 /** Bytes used in batchbuffer from batch_start_offset */
550 uint32_t batch_len; 550 __u32 batch_len;
551 uint32_t DR1; 551 __u32 DR1;
552 uint32_t DR4; 552 __u32 DR4;
553 uint32_t num_cliprects; 553 __u32 num_cliprects;
554 /** This is a struct drm_clip_rect *cliprects */ 554 /** This is a struct drm_clip_rect *cliprects */
555 uint64_t cliprects_ptr; 555 __u64 cliprects_ptr;
556}; 556};
557 557
558struct drm_i915_gem_pin { 558struct drm_i915_gem_pin {
559 /** Handle of the buffer to be pinned. */ 559 /** Handle of the buffer to be pinned. */
560 uint32_t handle; 560 __u32 handle;
561 uint32_t pad; 561 __u32 pad;
562 562
563 /** alignment required within the aperture */ 563 /** alignment required within the aperture */
564 uint64_t alignment; 564 __u64 alignment;
565 565
566 /** Returned GTT offset of the buffer. */ 566 /** Returned GTT offset of the buffer. */
567 uint64_t offset; 567 __u64 offset;
568}; 568};
569 569
570struct drm_i915_gem_unpin { 570struct drm_i915_gem_unpin {
571 /** Handle of the buffer to be unpinned. */ 571 /** Handle of the buffer to be unpinned. */
572 uint32_t handle; 572 __u32 handle;
573 uint32_t pad; 573 __u32 pad;
574}; 574};
575 575
576struct drm_i915_gem_busy { 576struct drm_i915_gem_busy {
577 /** Handle of the buffer to check for busy */ 577 /** Handle of the buffer to check for busy */
578 uint32_t handle; 578 __u32 handle;
579 579
580 /** Return busy status (1 if busy, 0 if idle) */ 580 /** Return busy status (1 if busy, 0 if idle) */
581 uint32_t busy; 581 __u32 busy;
582}; 582};
583 583
584#define I915_TILING_NONE 0 584#define I915_TILING_NONE 0
@@ -595,7 +595,7 @@ struct drm_i915_gem_busy {
595 595
596struct drm_i915_gem_set_tiling { 596struct drm_i915_gem_set_tiling {
597 /** Handle of the buffer to have its tiling state updated */ 597 /** Handle of the buffer to have its tiling state updated */
598 uint32_t handle; 598 __u32 handle;
599 599
600 /** 600 /**
601 * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X, 601 * Tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
@@ -609,47 +609,47 @@ struct drm_i915_gem_set_tiling {
609 * 609 *
610 * Buffer contents become undefined when changing tiling_mode. 610 * Buffer contents become undefined when changing tiling_mode.
611 */ 611 */
612 uint32_t tiling_mode; 612 __u32 tiling_mode;
613 613
614 /** 614 /**
615 * Stride in bytes for the object when in I915_TILING_X or 615 * Stride in bytes for the object when in I915_TILING_X or
616 * I915_TILING_Y. 616 * I915_TILING_Y.
617 */ 617 */
618 uint32_t stride; 618 __u32 stride;
619 619
620 /** 620 /**
621 * Returned address bit 6 swizzling required for CPU access through 621 * Returned address bit 6 swizzling required for CPU access through
622 * mmap mapping. 622 * mmap mapping.
623 */ 623 */
624 uint32_t swizzle_mode; 624 __u32 swizzle_mode;
625}; 625};
626 626
627struct drm_i915_gem_get_tiling { 627struct drm_i915_gem_get_tiling {
628 /** Handle of the buffer to get tiling state for. */ 628 /** Handle of the buffer to get tiling state for. */
629 uint32_t handle; 629 __u32 handle;
630 630
631 /** 631 /**
632 * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X, 632 * Current tiling mode for the object (I915_TILING_NONE, I915_TILING_X,
633 * I915_TILING_Y). 633 * I915_TILING_Y).
634 */ 634 */
635 uint32_t tiling_mode; 635 __u32 tiling_mode;
636 636
637 /** 637 /**
638 * Returned address bit 6 swizzling required for CPU access through 638 * Returned address bit 6 swizzling required for CPU access through
639 * mmap mapping. 639 * mmap mapping.
640 */ 640 */
641 uint32_t swizzle_mode; 641 __u32 swizzle_mode;
642}; 642};
643 643
644struct drm_i915_gem_get_aperture { 644struct drm_i915_gem_get_aperture {
645 /** Total size of the aperture used by i915_gem_execbuffer, in bytes */ 645 /** Total size of the aperture used by i915_gem_execbuffer, in bytes */
646 uint64_t aper_size; 646 __u64 aper_size;
647 647
648 /** 648 /**
649 * Available space in the aperture used by i915_gem_execbuffer, in 649 * Available space in the aperture used by i915_gem_execbuffer, in
650 * bytes 650 * bytes
651 */ 651 */
652 uint64_t aper_available_size; 652 __u64 aper_available_size;
653}; 653};
654 654
655#endif /* _I915_DRM_H_ */ 655#endif /* _I915_DRM_H_ */