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authorCarl Worth <cworth@cworth.org>2009-04-29 17:43:54 -0400
committerEric Anholt <eric@anholt.net>2009-05-14 19:00:32 -0400
commit08d7b3d1edff84bd673d9e9ab36b5aa62e1ba903 (patch)
tree0dcbb40ceb39aafab750bb06e2cd165dd906f8d3 /include/drm/i915_drm.h
parent9d2949a4cdb77b9b5c243c79be6489d34d770c7c (diff)
drm/i915: Add new GET_PIPE_FROM_CRTC_ID ioctl.
This allows userlevel code to discover the pipe number corresponding to a given CRTC ID. This is necessary for doing pipe-specific operations such as waiting for vblank on a given CRTC. Failure to use the right pipe mapping can result in GPU hangs, or at least failure to actually sync to vblank. Signed-off-by: Carl Worth <cworth@cworth.org> [anholt: Style touchups from review] Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'include/drm/i915_drm.h')
-rw-r--r--include/drm/i915_drm.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 95962fa8398a..8e1e92583fbc 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -184,6 +184,7 @@ typedef struct _drm_i915_sarea {
184#define DRM_I915_GEM_GET_TILING 0x22 184#define DRM_I915_GEM_GET_TILING 0x22
185#define DRM_I915_GEM_GET_APERTURE 0x23 185#define DRM_I915_GEM_GET_APERTURE 0x23
186#define DRM_I915_GEM_MMAP_GTT 0x24 186#define DRM_I915_GEM_MMAP_GTT 0x24
187#define DRM_I915_GET_PIPE_FROM_CRTC_ID 0x25
187 188
188#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 189#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
189#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 190#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -219,6 +220,7 @@ typedef struct _drm_i915_sarea {
219#define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling) 220#define DRM_IOCTL_I915_GEM_SET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_SET_TILING, struct drm_i915_gem_set_tiling)
220#define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling) 221#define DRM_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct drm_i915_gem_get_tiling)
221#define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture) 222#define DRM_IOCTL_I915_GEM_GET_APERTURE DRM_IOR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_APERTURE, struct drm_i915_gem_get_aperture)
223#define DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GET_PIPE_FROM_CRTC_ID, struct drm_intel_get_pipe_from_crtc_id)
222 224
223/* Allow drivers to submit batchbuffers directly to hardware, relying 225/* Allow drivers to submit batchbuffers directly to hardware, relying
224 * on the security mechanisms provided by hardware. 226 * on the security mechanisms provided by hardware.
@@ -657,4 +659,12 @@ struct drm_i915_gem_get_aperture {
657 __u64 aper_available_size; 659 __u64 aper_available_size;
658}; 660};
659 661
662struct drm_i915_get_pipe_from_crtc_id {
663 /** ID of CRTC being requested **/
664 __u32 crtc_id;
665
666 /** pipe of requested CRTC **/
667 __u32 pipe;
668};
669
660#endif /* _I915_DRM_H_ */ 670#endif /* _I915_DRM_H_ */