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authorJoonyoung Shim <jy0922.shim@samsung.com>2012-05-17 07:06:32 -0400
committerInki Dae <inki.dae@samsung.com>2012-05-17 07:14:48 -0400
commitd7f1642c90ab5eb2d7c48af0581c993094f97e1a (patch)
treef4da06335173851b681444fc815d140718586e23 /include/drm/exynos_drm.h
parent8dcb96b628a0749184bbcc5e6c94463f89405c58 (diff)
drm/exynos: add G2D driver
Changelog v3: - use __u64 instead of pointer in ioctl struct. The G2D is a 2D graphic accelerator that supports Bit Block Transfer. This G2D driver is exynos drm specific and supports only G2D(version 4.1) of later Exynos series from Exynos4X12 because supporting DMA. The G2D is performed by two tasks simply. 1. Configures the rendering parameters, such as foreground color and coordinates data by setting the drawing context registers. 2. Start the rendering process by setting thre relevant command registers accordingly. The G2D version 4.1 supports DMA mode as host interface. User can make command list to reduce HOST(ARM) loads. The contents of The command list is setted to relevant registers of G2D by DMA. The command list is composed Header and command sets and Tail. - Header: The number of command set(4Bytes) - Command set: Register offset(4Bytes) + Register data(4Bytes) - Tail: Pointer of base address of the other command list(4Bytes) By Tail field, the G2D can process many command lists without halt at one go. The G2D has following the rendering pipeline. --> Primitive Drawing --> Rotation --> Clipping --> Bilinear Sampling --> Color Key --> ROP --> Mask Operation --> Alpha Blending --> Dithering --> FrameBuffer And supports various operations from the rendering pipeline. - copy - fast solid color fill - window clipping - rotation - flip - 4 operand raster operation(ROP4) - masking operation - alpha blending - color key - dithering - etc User should make the command list to data and registers needed by operation to use. The Exynos G2D driver only manages the command lists received from user. Some registers needs memory base address(physical address) of image. User doesn't know its physical address, so fills the gem handle of that memory than address to command sets, then G2D driver converts it to memory base address. We adds three ioctls and one event for Exynos G2D. - ioctls DRM_EXYNOS_G2D_GET_VER: get the G2D hardware version DRM_EXYNOS_G2D_SET_CMDLIST: set the command list from user to driver DRM_EXYNOS_G2D_EXEC: execute the command lists setted to driver - event DRM_EXYNOS_G2D_EVENT: event to give notification completion of the command list to user Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Diffstat (limited to 'include/drm/exynos_drm.h')
-rw-r--r--include/drm/exynos_drm.h57
1 files changed, 57 insertions, 0 deletions
diff --git a/include/drm/exynos_drm.h b/include/drm/exynos_drm.h
index 44f79cf468d4..b6d7ce92eadd 100644
--- a/include/drm/exynos_drm.h
+++ b/include/drm/exynos_drm.h
@@ -29,6 +29,8 @@
29#ifndef _EXYNOS_DRM_H_ 29#ifndef _EXYNOS_DRM_H_
30#define _EXYNOS_DRM_H_ 30#define _EXYNOS_DRM_H_
31 31
32#include "drm.h"
33
32/** 34/**
33 * User-desired buffer creation information structure. 35 * User-desired buffer creation information structure.
34 * 36 *
@@ -124,6 +126,37 @@ enum e_drm_exynos_gem_mem_type {
124 EXYNOS_BO_WC 126 EXYNOS_BO_WC
125}; 127};
126 128
129struct drm_exynos_g2d_get_ver {
130 __u32 major;
131 __u32 minor;
132};
133
134struct drm_exynos_g2d_cmd {
135 __u32 offset;
136 __u32 data;
137};
138
139enum drm_exynos_g2d_event_type {
140 G2D_EVENT_NOT,
141 G2D_EVENT_NONSTOP,
142 G2D_EVENT_STOP, /* not yet */
143};
144
145struct drm_exynos_g2d_set_cmdlist {
146 __u64 cmd;
147 __u64 cmd_gem;
148 __u32 cmd_nr;
149 __u32 cmd_gem_nr;
150
151 /* for g2d event */
152 __u64 event_type;
153 __u64 user_data;
154};
155
156struct drm_exynos_g2d_exec {
157 __u64 async;
158};
159
127#define DRM_EXYNOS_GEM_CREATE 0x00 160#define DRM_EXYNOS_GEM_CREATE 0x00
128#define DRM_EXYNOS_GEM_MAP_OFFSET 0x01 161#define DRM_EXYNOS_GEM_MAP_OFFSET 0x01
129#define DRM_EXYNOS_GEM_MMAP 0x02 162#define DRM_EXYNOS_GEM_MMAP 0x02
@@ -132,6 +165,11 @@ enum e_drm_exynos_gem_mem_type {
132#define DRM_EXYNOS_PLANE_SET_ZPOS 0x06 165#define DRM_EXYNOS_PLANE_SET_ZPOS 0x06
133#define DRM_EXYNOS_VIDI_CONNECTION 0x07 166#define DRM_EXYNOS_VIDI_CONNECTION 0x07
134 167
168/* G2D */
169#define DRM_EXYNOS_G2D_GET_VER 0x20
170#define DRM_EXYNOS_G2D_SET_CMDLIST 0x21
171#define DRM_EXYNOS_G2D_EXEC 0x22
172
135#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \ 173#define DRM_IOCTL_EXYNOS_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
136 DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create) 174 DRM_EXYNOS_GEM_CREATE, struct drm_exynos_gem_create)
137 175
@@ -150,6 +188,25 @@ enum e_drm_exynos_gem_mem_type {
150#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \ 188#define DRM_IOCTL_EXYNOS_VIDI_CONNECTION DRM_IOWR(DRM_COMMAND_BASE + \
151 DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection) 189 DRM_EXYNOS_VIDI_CONNECTION, struct drm_exynos_vidi_connection)
152 190
191#define DRM_IOCTL_EXYNOS_G2D_GET_VER DRM_IOWR(DRM_COMMAND_BASE + \
192 DRM_EXYNOS_G2D_GET_VER, struct drm_exynos_g2d_get_ver)
193#define DRM_IOCTL_EXYNOS_G2D_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \
194 DRM_EXYNOS_G2D_SET_CMDLIST, struct drm_exynos_g2d_set_cmdlist)
195#define DRM_IOCTL_EXYNOS_G2D_EXEC DRM_IOWR(DRM_COMMAND_BASE + \
196 DRM_EXYNOS_G2D_EXEC, struct drm_exynos_g2d_exec)
197
198/* EXYNOS specific events */
199#define DRM_EXYNOS_G2D_EVENT 0x80000000
200
201struct drm_exynos_g2d_event {
202 struct drm_event base;
203 __u64 user_data;
204 __u32 tv_sec;
205 __u32 tv_usec;
206 __u32 cmdlist_no;
207 __u32 reserved;
208};
209
153#ifdef __KERNEL__ 210#ifdef __KERNEL__
154 211
155/** 212/**