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authorLen Brown <len.brown@intel.com>2005-09-08 01:45:47 -0400
committerLen Brown <len.brown@intel.com>2005-09-08 01:45:47 -0400
commit64e47488c913ac704d465a6af86a26786d1412a5 (patch)
treed3b0148592963dcde26e4bb35ddfec8b1eaf8e23 /include/asm-xtensa
parent4a35a46bf1cda4737c428380d1db5d15e2590d18 (diff)
parentcaf39e87cc1182f7dae84eefc43ca14d54c78ef9 (diff)
Merge linux-2.6 with linux-acpi-2.6
Diffstat (limited to 'include/asm-xtensa')
-rw-r--r--include/asm-xtensa/atomic.h12
-rw-r--r--include/asm-xtensa/auxvec.h4
-rw-r--r--include/asm-xtensa/checksum.h4
-rw-r--r--include/asm-xtensa/delay.h2
-rw-r--r--include/asm-xtensa/fcntl.h48
-rw-r--r--include/asm-xtensa/hdreg.h17
-rw-r--r--include/asm-xtensa/io.h14
-rw-r--r--include/asm-xtensa/mmu_context.h18
-rw-r--r--include/asm-xtensa/page.h2
-rw-r--r--include/asm-xtensa/page.h.n135
-rw-r--r--include/asm-xtensa/pci.h4
-rw-r--r--include/asm-xtensa/pgtable.h6
-rw-r--r--include/asm-xtensa/semaphore.h10
-rw-r--r--include/asm-xtensa/string.h8
-rw-r--r--include/asm-xtensa/system.h10
-rw-r--r--include/asm-xtensa/tlbflush.h40
-rw-r--r--include/asm-xtensa/types.h2
-rw-r--r--include/asm-xtensa/uaccess.h10
18 files changed, 78 insertions, 268 deletions
diff --git a/include/asm-xtensa/atomic.h b/include/asm-xtensa/atomic.h
index d72bcb32ba4f..24f86f0e43cf 100644
--- a/include/asm-xtensa/atomic.h
+++ b/include/asm-xtensa/atomic.h
@@ -66,7 +66,7 @@ typedef struct { volatile int counter; } atomic_t;
66 * 66 *
67 * Atomically adds @i to @v. 67 * Atomically adds @i to @v.
68 */ 68 */
69extern __inline__ void atomic_add(int i, atomic_t * v) 69static inline void atomic_add(int i, atomic_t * v)
70{ 70{
71 unsigned int vval; 71 unsigned int vval;
72 72
@@ -90,7 +90,7 @@ extern __inline__ void atomic_add(int i, atomic_t * v)
90 * 90 *
91 * Atomically subtracts @i from @v. 91 * Atomically subtracts @i from @v.
92 */ 92 */
93extern __inline__ void atomic_sub(int i, atomic_t *v) 93static inline void atomic_sub(int i, atomic_t *v)
94{ 94{
95 unsigned int vval; 95 unsigned int vval;
96 96
@@ -111,7 +111,7 @@ extern __inline__ void atomic_sub(int i, atomic_t *v)
111 * We use atomic_{add|sub}_return to define other functions. 111 * We use atomic_{add|sub}_return to define other functions.
112 */ 112 */
113 113
114extern __inline__ int atomic_add_return(int i, atomic_t * v) 114static inline int atomic_add_return(int i, atomic_t * v)
115{ 115{
116 unsigned int vval; 116 unsigned int vval;
117 117
@@ -130,7 +130,7 @@ extern __inline__ int atomic_add_return(int i, atomic_t * v)
130 return vval; 130 return vval;
131} 131}
132 132
133extern __inline__ int atomic_sub_return(int i, atomic_t * v) 133static inline int atomic_sub_return(int i, atomic_t * v)
134{ 134{
135 unsigned int vval; 135 unsigned int vval;
136 136
@@ -224,7 +224,7 @@ extern __inline__ int atomic_sub_return(int i, atomic_t * v)
224#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0) 224#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)
225 225
226 226
227extern __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v) 227static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
228{ 228{
229 unsigned int all_f = -1; 229 unsigned int all_f = -1;
230 unsigned int vval; 230 unsigned int vval;
@@ -243,7 +243,7 @@ extern __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v)
243 ); 243 );
244} 244}
245 245
246extern __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v) 246static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
247{ 247{
248 unsigned int vval; 248 unsigned int vval;
249 249
diff --git a/include/asm-xtensa/auxvec.h b/include/asm-xtensa/auxvec.h
new file mode 100644
index 000000000000..257dec75c5af
--- /dev/null
+++ b/include/asm-xtensa/auxvec.h
@@ -0,0 +1,4 @@
1#ifndef __XTENSA_AUXVEC_H
2#define __XTENSA_AUXVEC_H
3
4#endif
diff --git a/include/asm-xtensa/checksum.h b/include/asm-xtensa/checksum.h
index 1a00fad19929..81a797ae3abe 100644
--- a/include/asm-xtensa/checksum.h
+++ b/include/asm-xtensa/checksum.h
@@ -47,14 +47,14 @@ asmlinkage unsigned int csum_partial_copy_generic( const char *src, char *dst, i
47 * If you use these functions directly please don't forget the 47 * If you use these functions directly please don't forget the
48 * verify_area(). 48 * verify_area().
49 */ 49 */
50extern __inline__ 50static inline
51unsigned int csum_partial_copy_nocheck ( const char *src, char *dst, 51unsigned int csum_partial_copy_nocheck ( const char *src, char *dst,
52 int len, int sum) 52 int len, int sum)
53{ 53{
54 return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL); 54 return csum_partial_copy_generic ( src, dst, len, sum, NULL, NULL);
55} 55}
56 56
57extern __inline__ 57static inline
58unsigned int csum_partial_copy_from_user ( const char *src, char *dst, 58unsigned int csum_partial_copy_from_user ( const char *src, char *dst,
59 int len, int sum, int *err_ptr) 59 int len, int sum, int *err_ptr)
60{ 60{
diff --git a/include/asm-xtensa/delay.h b/include/asm-xtensa/delay.h
index 0a123d53a636..1bc601ec3621 100644
--- a/include/asm-xtensa/delay.h
+++ b/include/asm-xtensa/delay.h
@@ -18,7 +18,7 @@
18 18
19extern unsigned long loops_per_jiffy; 19extern unsigned long loops_per_jiffy;
20 20
21extern __inline__ void __delay(unsigned long loops) 21static inline void __delay(unsigned long loops)
22{ 22{
23 /* 2 cycles per loop. */ 23 /* 2 cycles per loop. */
24 __asm__ __volatile__ ("1: addi %0, %0, -2; bgeui %0, 2, 1b" 24 __asm__ __volatile__ ("1: addi %0, %0, -2; bgeui %0, 2, 1b"
diff --git a/include/asm-xtensa/fcntl.h b/include/asm-xtensa/fcntl.h
index 48876bb727d2..ec066ae96caf 100644
--- a/include/asm-xtensa/fcntl.h
+++ b/include/asm-xtensa/fcntl.h
@@ -14,31 +14,17 @@
14 14
15/* open/fcntl - O_SYNC is only implemented on blocks devices and on files 15/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
16 located on an ext2 file system */ 16 located on an ext2 file system */
17#define O_ACCMODE 0x0003
18#define O_RDONLY 0x0000
19#define O_WRONLY 0x0001
20#define O_RDWR 0x0002
21#define O_APPEND 0x0008 17#define O_APPEND 0x0008
22#define O_SYNC 0x0010 18#define O_SYNC 0x0010
23#define O_NONBLOCK 0x0080 19#define O_NONBLOCK 0x0080
24#define O_CREAT 0x0100 /* not fcntl */ 20#define O_CREAT 0x0100 /* not fcntl */
25#define O_TRUNC 0x0200 /* not fcntl */
26#define O_EXCL 0x0400 /* not fcntl */ 21#define O_EXCL 0x0400 /* not fcntl */
27#define O_NOCTTY 0x0800 /* not fcntl */ 22#define O_NOCTTY 0x0800 /* not fcntl */
28#define FASYNC 0x1000 /* fcntl, for BSD compatibility */ 23#define FASYNC 0x1000 /* fcntl, for BSD compatibility */
29#define O_LARGEFILE 0x2000 /* allow large file opens - currently ignored */ 24#define O_LARGEFILE 0x2000 /* allow large file opens - currently ignored */
30#define O_DIRECT 0x8000 /* direct disk access hint - currently ignored*/ 25#define O_DIRECT 0x8000 /* direct disk access hint - currently ignored*/
31#define O_DIRECTORY 0x10000 /* must be a directory */
32#define O_NOFOLLOW 0x20000 /* don't follow links */
33#define O_NOATIME 0x100000 26#define O_NOATIME 0x100000
34 27
35#define O_NDELAY O_NONBLOCK
36
37#define F_DUPFD 0 /* dup */
38#define F_GETFD 1 /* get close_on_exec */
39#define F_SETFD 2 /* set/clear close_on_exec */
40#define F_GETFL 3 /* get file->f_flags */
41#define F_SETFL 4 /* set file->f_flags */
42#define F_GETLK 14 28#define F_GETLK 14
43#define F_GETLK64 15 29#define F_GETLK64 15
44#define F_SETLK 6 30#define F_SETLK 6
@@ -48,35 +34,6 @@
48 34
49#define F_SETOWN 24 /* for sockets. */ 35#define F_SETOWN 24 /* for sockets. */
50#define F_GETOWN 23 /* for sockets. */ 36#define F_GETOWN 23 /* for sockets. */
51#define F_SETSIG 10 /* for sockets. */
52#define F_GETSIG 11 /* for sockets. */
53
54/* for F_[GET|SET]FL */
55#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
56
57/* for posix fcntl() and lockf() */
58#define F_RDLCK 0
59#define F_WRLCK 1
60#define F_UNLCK 2
61
62/* for old implementation of bsd flock () */
63#define F_EXLCK 4 /* or 3 */
64#define F_SHLCK 8 /* or 4 */
65
66/* for leases */
67#define F_INPROGRESS 16
68
69/* operations for bsd flock(), also used by the kernel implementation */
70#define LOCK_SH 1 /* shared lock */
71#define LOCK_EX 2 /* exclusive lock */
72#define LOCK_NB 4 /* or'd with one of the above to prevent
73 blocking */
74#define LOCK_UN 8 /* remove lock */
75
76#define LOCK_MAND 32 /* This is a mandatory flock ... */
77#define LOCK_READ 64 /* which allows concurrent read operations */
78#define LOCK_WRITE 128 /* which allows concurrent write operations */
79#define LOCK_RW 192 /* which allows concurrent read & write ops */
80 37
81typedef struct flock { 38typedef struct flock {
82 short l_type; 39 short l_type;
@@ -96,6 +53,9 @@ struct flock64 {
96 pid_t l_pid; 53 pid_t l_pid;
97}; 54};
98 55
99#define F_LINUX_SPECIFIC_BASE 1024 56#define HAVE_ARCH_STRUCT_FLOCK
57#define HAVE_ARCH_STRUCT_FLOCK64
58
59#include <asm-generic/fcntl.h>
100 60
101#endif /* _XTENSA_FCNTL_H */ 61#endif /* _XTENSA_FCNTL_H */
diff --git a/include/asm-xtensa/hdreg.h b/include/asm-xtensa/hdreg.h
deleted file mode 100644
index 64b80607b80d..000000000000
--- a/include/asm-xtensa/hdreg.h
+++ /dev/null
@@ -1,17 +0,0 @@
1/*
2 * include/asm-xtensa/hdreg.h
3 *
4 * This file is subject to the terms and conditions of the GNU General
5 * Public License. See the file "COPYING" in the main directory of
6 * this archive for more details.
7 *
8 * Copyright (C) 2002 - 2005 Tensilica Inc.
9 * Copyright (C) 1994-1996 Linus Torvalds & authors
10 */
11
12#ifndef _XTENSA_HDREG_H
13#define _XTENSA_HDREG_H
14
15typedef unsigned int ide_ioreg_t;
16
17#endif
diff --git a/include/asm-xtensa/io.h b/include/asm-xtensa/io.h
index 2c471c42ecfc..c5c13985bbe1 100644
--- a/include/asm-xtensa/io.h
+++ b/include/asm-xtensa/io.h
@@ -41,12 +41,12 @@ static inline unsigned int _swapl (unsigned int v)
41 * These are trivial on the 1:1 Linux/Xtensa mapping 41 * These are trivial on the 1:1 Linux/Xtensa mapping
42 */ 42 */
43 43
44extern inline unsigned long virt_to_phys(volatile void * address) 44static inline unsigned long virt_to_phys(volatile void * address)
45{ 45{
46 return PHYSADDR((unsigned long)address); 46 return PHYSADDR((unsigned long)address);
47} 47}
48 48
49extern inline void * phys_to_virt(unsigned long address) 49static inline void * phys_to_virt(unsigned long address)
50{ 50{
51 return (void*) CACHED_ADDR(address); 51 return (void*) CACHED_ADDR(address);
52} 52}
@@ -55,12 +55,12 @@ extern inline void * phys_to_virt(unsigned long address)
55 * IO bus memory addresses are also 1:1 with the physical address 55 * IO bus memory addresses are also 1:1 with the physical address
56 */ 56 */
57 57
58extern inline unsigned long virt_to_bus(volatile void * address) 58static inline unsigned long virt_to_bus(volatile void * address)
59{ 59{
60 return PHYSADDR((unsigned long)address); 60 return PHYSADDR((unsigned long)address);
61} 61}
62 62
63extern inline void * bus_to_virt (unsigned long address) 63static inline void * bus_to_virt (unsigned long address)
64{ 64{
65 return (void *) CACHED_ADDR(address); 65 return (void *) CACHED_ADDR(address);
66} 66}
@@ -69,17 +69,17 @@ extern inline void * bus_to_virt (unsigned long address)
69 * Change "struct page" to physical address. 69 * Change "struct page" to physical address.
70 */ 70 */
71 71
72extern inline void *ioremap(unsigned long offset, unsigned long size) 72static inline void *ioremap(unsigned long offset, unsigned long size)
73{ 73{
74 return (void *) CACHED_ADDR_IO(offset); 74 return (void *) CACHED_ADDR_IO(offset);
75} 75}
76 76
77extern inline void *ioremap_nocache(unsigned long offset, unsigned long size) 77static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
78{ 78{
79 return (void *) BYPASS_ADDR_IO(offset); 79 return (void *) BYPASS_ADDR_IO(offset);
80} 80}
81 81
82extern inline void iounmap(void *addr) 82static inline void iounmap(void *addr)
83{ 83{
84} 84}
85 85
diff --git a/include/asm-xtensa/mmu_context.h b/include/asm-xtensa/mmu_context.h
index 1b0801548cd9..364a7b057bfa 100644
--- a/include/asm-xtensa/mmu_context.h
+++ b/include/asm-xtensa/mmu_context.h
@@ -199,13 +199,13 @@ extern pgd_t *current_pgd;
199#define ASID_FIRST_VERSION \ 199#define ASID_FIRST_VERSION \
200 ((unsigned long)(~ASID_VERSION_MASK) + 1 + ASID_FIRST_NONRESERVED) 200 ((unsigned long)(~ASID_VERSION_MASK) + 1 + ASID_FIRST_NONRESERVED)
201 201
202extern inline void set_rasid_register (unsigned long val) 202static inline void set_rasid_register (unsigned long val)
203{ 203{
204 __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t" 204 __asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t"
205 " isync\n" : : "a" (val)); 205 " isync\n" : : "a" (val));
206} 206}
207 207
208extern inline unsigned long get_rasid_register (void) 208static inline unsigned long get_rasid_register (void)
209{ 209{
210 unsigned long tmp; 210 unsigned long tmp;
211 __asm__ __volatile__ (" rsr %0, "__stringify(RASID)"\n\t" : "=a" (tmp)); 211 __asm__ __volatile__ (" rsr %0, "__stringify(RASID)"\n\t" : "=a" (tmp));
@@ -215,7 +215,7 @@ extern inline unsigned long get_rasid_register (void)
215 215
216#if ((XCHAL_MMU_ASID_INVALID == 0) && (XCHAL_MMU_ASID_KERNEL == 1)) 216#if ((XCHAL_MMU_ASID_INVALID == 0) && (XCHAL_MMU_ASID_KERNEL == 1))
217 217
218extern inline void 218static inline void
219get_new_mmu_context(struct mm_struct *mm, unsigned long asid) 219get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
220{ 220{
221 extern void flush_tlb_all(void); 221 extern void flush_tlb_all(void);
@@ -234,7 +234,7 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
234/* XCHAL_MMU_ASID_INVALID == 0 and XCHAL_MMU_ASID_KERNEL ==1 are 234/* XCHAL_MMU_ASID_INVALID == 0 and XCHAL_MMU_ASID_KERNEL ==1 are
235 really the best, but if you insist... */ 235 really the best, but if you insist... */
236 236
237extern inline int validate_asid (unsigned long asid) 237static inline int validate_asid (unsigned long asid)
238{ 238{
239 switch (asid) { 239 switch (asid) {
240 case XCHAL_MMU_ASID_INVALID: 240 case XCHAL_MMU_ASID_INVALID:
@@ -247,7 +247,7 @@ extern inline int validate_asid (unsigned long asid)
247 return 1; /* valid */ 247 return 1; /* valid */
248} 248}
249 249
250extern inline void 250static inline void
251get_new_mmu_context(struct mm_struct *mm, unsigned long asid) 251get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
252{ 252{
253 extern void flush_tlb_all(void); 253 extern void flush_tlb_all(void);
@@ -274,14 +274,14 @@ get_new_mmu_context(struct mm_struct *mm, unsigned long asid)
274 * instance. 274 * instance.
275 */ 275 */
276 276
277extern inline int 277static inline int
278init_new_context(struct task_struct *tsk, struct mm_struct *mm) 278init_new_context(struct task_struct *tsk, struct mm_struct *mm)
279{ 279{
280 mm->context = NO_CONTEXT; 280 mm->context = NO_CONTEXT;
281 return 0; 281 return 0;
282} 282}
283 283
284extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, 284static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
285 struct task_struct *tsk) 285 struct task_struct *tsk)
286{ 286{
287 unsigned long asid = asid_cache; 287 unsigned long asid = asid_cache;
@@ -301,7 +301,7 @@ extern inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
301 * Destroy context related info for an mm_struct that is about 301 * Destroy context related info for an mm_struct that is about
302 * to be put to rest. 302 * to be put to rest.
303 */ 303 */
304extern inline void destroy_context(struct mm_struct *mm) 304static inline void destroy_context(struct mm_struct *mm)
305{ 305{
306 /* Nothing to do. */ 306 /* Nothing to do. */
307} 307}
@@ -310,7 +310,7 @@ extern inline void destroy_context(struct mm_struct *mm)
310 * After we have set current->mm to a new value, this activates 310 * After we have set current->mm to a new value, this activates
311 * the context for the new mm so we see the new mappings. 311 * the context for the new mm so we see the new mappings.
312 */ 312 */
313extern inline void 313static inline void
314activate_mm(struct mm_struct *prev, struct mm_struct *next) 314activate_mm(struct mm_struct *prev, struct mm_struct *next)
315{ 315{
316 /* Unconditionally get a new ASID. */ 316 /* Unconditionally get a new ASID. */
diff --git a/include/asm-xtensa/page.h b/include/asm-xtensa/page.h
index b495e5b5a942..8ded36f255a2 100644
--- a/include/asm-xtensa/page.h
+++ b/include/asm-xtensa/page.h
@@ -55,7 +55,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
55 * Pure 2^n version of get_order 55 * Pure 2^n version of get_order
56 */ 56 */
57 57
58extern __inline__ int get_order(unsigned long size) 58static inline int get_order(unsigned long size)
59{ 59{
60 int order; 60 int order;
61#ifndef XCHAL_HAVE_NSU 61#ifndef XCHAL_HAVE_NSU
diff --git a/include/asm-xtensa/page.h.n b/include/asm-xtensa/page.h.n
deleted file mode 100644
index 546cc6624f24..000000000000
--- a/include/asm-xtensa/page.h.n
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 * linux/include/asm-xtensa/page.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_PAGE_H
12#define _XTENSA_PAGE_H
13
14#ifdef __KERNEL__
15
16#include <asm/processor.h>
17#include <linux/config.h>
18
19/*
20 * PAGE_SHIFT determines the page size
21 * PAGE_ALIGN(x) aligns the pointer to the (next) page boundary
22 */
23#define PAGE_SHIFT XCHAL_MMU_MIN_PTE_PAGE_SIZE
24#define PAGE_SIZE (1 << PAGE_SHIFT)
25#define PAGE_MASK (~(PAGE_SIZE-1))
26#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE - 1) & PAGE_MASK)
27
28#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE / XCHAL_DCACHE_WAYS)
29#define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR
30
31#ifdef __ASSEMBLY__
32
33#define __pgprot(x) (x)
34
35#else
36
37
38/*
39 * These are used to make use of C type-checking..
40 */
41typedef struct { unsigned long pte; } pte_t; /* page table entry */
42typedef struct { unsigned long pmd; } pmd_t; /* PMD table entry */
43typedef struct { unsigned long pgd; } pgd_t; /* PGD table entry */
44typedef struct { unsigned long pgprot; } pgprot_t;
45
46#define pte_val(x) ((x).pte)
47#define pmd_val(x) ((x).pmd)
48#define pgd_val(x) ((x).pgd)
49#define pgprot_val(x) ((x).pgprot)
50
51#define __pte(x) ((pte_t) { (x) } )
52#define __pmd(x) ((pmd_t) { (x) } )
53#define __pgd(x) ((pgd_t) { (x) } )
54#define __pgprot(x) ((pgprot_t) { (x) } )
55
56/*
57 * Pure 2^n version of get_order
58 */
59extern __inline__ int get_order(unsigned long size)
60{
61 int order;
62#ifndef XCHAL_HAVE_NSU
63 unsigned long x1, x2, x4, x8, x16;
64
65 size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
66 x1 = size & 0xAAAAAAAA;
67 x2 = size & 0xCCCCCCCC;
68 x4 = size & 0xF0F0F0F0;
69 x8 = size & 0xFF00FF00;
70 x16 = size & 0xFFFF0000;
71 order = x2 ? 2 : 0;
72 order += (x16 != 0) * 16;
73 order += (x8 != 0) * 8;
74 order += (x4 != 0) * 4;
75 order += (x1 != 0);
76
77 return order;
78#else
79 size = (size - 1) >> PAGE_SHIFT;
80 asm ("nsau %0, %1" : "=r" (order) : "r" (size));
81 return 32 - order;
82#endif
83}
84
85
86struct page;
87extern void clear_page(void *page);
88extern void copy_page(void *to, void *from);
89
90/*
91 * If we have cache aliasing and writeback caches, we might have to do
92 * some extra work
93 */
94
95#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
96void clear_user_page(void *addr, unsigned long vaddr, struct page* page);
97void copy_user_page(void *to, void* from, unsigned long vaddr, struct page* page);
98#else
99# define clear_user_page(page,vaddr,pg) clear_page(page)
100# define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
101#endif
102
103
104/*
105 * This handles the memory map. We handle pages at
106 * XCHAL_KSEG_CACHED_VADDR for kernels with 32 bit address space.
107 * These macros are for conversion of kernel address, not user
108 * addresses.
109 */
110
111#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
112#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
113#define pfn_valid(pfn) ((unsigned long)pfn < max_mapnr)
114#ifndef CONFIG_DISCONTIGMEM
115# define pfn_to_page(pfn) (mem_map + (pfn))
116# define page_to_pfn(page) ((unsigned long)((page) - mem_map))
117#else
118# error CONFIG_DISCONTIGMEM not supported
119#endif
120
121#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
122#define page_to_virt(page) __va(page_to_pfn(page) << PAGE_SHIFT)
123#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
124#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
125
126#define WANT_PAGE_VIRTUAL
127
128
129#endif /* __ASSEMBLY__ */
130
131#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
132 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
133
134#endif /* __KERNEL__ */
135#endif /* _XTENSA_PAGE_H */
diff --git a/include/asm-xtensa/pci.h b/include/asm-xtensa/pci.h
index 6817742301c2..24eb7fc25da8 100644
--- a/include/asm-xtensa/pci.h
+++ b/include/asm-xtensa/pci.h
@@ -22,12 +22,12 @@
22 22
23extern struct pci_controller* pcibios_alloc_controller(void); 23extern struct pci_controller* pcibios_alloc_controller(void);
24 24
25extern inline void pcibios_set_master(struct pci_dev *dev) 25static inline void pcibios_set_master(struct pci_dev *dev)
26{ 26{
27 /* No special bus mastering setup handling */ 27 /* No special bus mastering setup handling */
28} 28}
29 29
30extern inline void pcibios_penalize_isa_irq(int irq) 30static inline void pcibios_penalize_isa_irq(int irq)
31{ 31{
32 /* We don't do dynamic PCI IRQ allocation */ 32 /* We don't do dynamic PCI IRQ allocation */
33} 33}
diff --git a/include/asm-xtensa/pgtable.h b/include/asm-xtensa/pgtable.h
index 0bb6416ae266..883ebc2d75d6 100644
--- a/include/asm-xtensa/pgtable.h
+++ b/include/asm-xtensa/pgtable.h
@@ -260,7 +260,7 @@ static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_RW; return pt
260#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 260#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
261#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) 261#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
262 262
263extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 263static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
264{ 264{
265 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)); 265 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
266} 266}
@@ -278,14 +278,14 @@ static inline void update_pte(pte_t *ptep, pte_t pteval)
278#endif 278#endif
279} 279}
280 280
281extern inline void 281static inline void
282set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval) 282set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pteval)
283{ 283{
284 update_pte(ptep, pteval); 284 update_pte(ptep, pteval);
285} 285}
286 286
287 287
288extern inline void 288static inline void
289set_pmd(pmd_t *pmdp, pmd_t pmdval) 289set_pmd(pmd_t *pmdp, pmd_t pmdval)
290{ 290{
291 *pmdp = pmdval; 291 *pmdp = pmdval;
diff --git a/include/asm-xtensa/semaphore.h b/include/asm-xtensa/semaphore.h
index c8a7574a9a57..db740b8bc6f0 100644
--- a/include/asm-xtensa/semaphore.h
+++ b/include/asm-xtensa/semaphore.h
@@ -47,7 +47,7 @@ struct semaphore {
47#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1) 47#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
48#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0) 48#define DECLARE_MUTEX_LOCKED(name) __DECLARE_SEMAPHORE_GENERIC(name,0)
49 49
50extern inline void sema_init (struct semaphore *sem, int val) 50static inline void sema_init (struct semaphore *sem, int val)
51{ 51{
52/* 52/*
53 * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val); 53 * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val);
@@ -79,7 +79,7 @@ asmlinkage void __up(struct semaphore * sem);
79 79
80extern spinlock_t semaphore_wake_lock; 80extern spinlock_t semaphore_wake_lock;
81 81
82extern __inline__ void down(struct semaphore * sem) 82static inline void down(struct semaphore * sem)
83{ 83{
84#if WAITQUEUE_DEBUG 84#if WAITQUEUE_DEBUG
85 CHECK_MAGIC(sem->__magic); 85 CHECK_MAGIC(sem->__magic);
@@ -89,7 +89,7 @@ extern __inline__ void down(struct semaphore * sem)
89 __down(sem); 89 __down(sem);
90} 90}
91 91
92extern __inline__ int down_interruptible(struct semaphore * sem) 92static inline int down_interruptible(struct semaphore * sem)
93{ 93{
94 int ret = 0; 94 int ret = 0;
95#if WAITQUEUE_DEBUG 95#if WAITQUEUE_DEBUG
@@ -101,7 +101,7 @@ extern __inline__ int down_interruptible(struct semaphore * sem)
101 return ret; 101 return ret;
102} 102}
103 103
104extern __inline__ int down_trylock(struct semaphore * sem) 104static inline int down_trylock(struct semaphore * sem)
105{ 105{
106 int ret = 0; 106 int ret = 0;
107#if WAITQUEUE_DEBUG 107#if WAITQUEUE_DEBUG
@@ -117,7 +117,7 @@ extern __inline__ int down_trylock(struct semaphore * sem)
117 * Note! This is subtle. We jump to wake people up only if 117 * Note! This is subtle. We jump to wake people up only if
118 * the semaphore was negative (== somebody was waiting on it). 118 * the semaphore was negative (== somebody was waiting on it).
119 */ 119 */
120extern __inline__ void up(struct semaphore * sem) 120static inline void up(struct semaphore * sem)
121{ 121{
122#if WAITQUEUE_DEBUG 122#if WAITQUEUE_DEBUG
123 CHECK_MAGIC(sem->__magic); 123 CHECK_MAGIC(sem->__magic);
diff --git a/include/asm-xtensa/string.h b/include/asm-xtensa/string.h
index 3f81b27d9809..5fb8c27cbef5 100644
--- a/include/asm-xtensa/string.h
+++ b/include/asm-xtensa/string.h
@@ -16,7 +16,7 @@
16#define _XTENSA_STRING_H 16#define _XTENSA_STRING_H
17 17
18#define __HAVE_ARCH_STRCPY 18#define __HAVE_ARCH_STRCPY
19extern __inline__ char *strcpy(char *__dest, const char *__src) 19static inline char *strcpy(char *__dest, const char *__src)
20{ 20{
21 register char *__xdest = __dest; 21 register char *__xdest = __dest;
22 unsigned long __dummy; 22 unsigned long __dummy;
@@ -35,7 +35,7 @@ extern __inline__ char *strcpy(char *__dest, const char *__src)
35} 35}
36 36
37#define __HAVE_ARCH_STRNCPY 37#define __HAVE_ARCH_STRNCPY
38extern __inline__ char *strncpy(char *__dest, const char *__src, size_t __n) 38static inline char *strncpy(char *__dest, const char *__src, size_t __n)
39{ 39{
40 register char *__xdest = __dest; 40 register char *__xdest = __dest;
41 unsigned long __dummy; 41 unsigned long __dummy;
@@ -60,7 +60,7 @@ extern __inline__ char *strncpy(char *__dest, const char *__src, size_t __n)
60} 60}
61 61
62#define __HAVE_ARCH_STRCMP 62#define __HAVE_ARCH_STRCMP
63extern __inline__ int strcmp(const char *__cs, const char *__ct) 63static inline int strcmp(const char *__cs, const char *__ct)
64{ 64{
65 register int __res; 65 register int __res;
66 unsigned long __dummy; 66 unsigned long __dummy;
@@ -82,7 +82,7 @@ extern __inline__ int strcmp(const char *__cs, const char *__ct)
82} 82}
83 83
84#define __HAVE_ARCH_STRNCMP 84#define __HAVE_ARCH_STRNCMP
85extern __inline__ int strncmp(const char *__cs, const char *__ct, size_t __n) 85static inline int strncmp(const char *__cs, const char *__ct, size_t __n)
86{ 86{
87 register int __res; 87 register int __res;
88 unsigned long __dummy; 88 unsigned long __dummy;
diff --git a/include/asm-xtensa/system.h b/include/asm-xtensa/system.h
index 690fe325e671..f09393232e5e 100644
--- a/include/asm-xtensa/system.h
+++ b/include/asm-xtensa/system.h
@@ -56,7 +56,7 @@ static inline int irqs_disabled(void)
56 56
57#define clear_cpenable() __clear_cpenable() 57#define clear_cpenable() __clear_cpenable()
58 58
59extern __inline__ void __clear_cpenable(void) 59static inline void __clear_cpenable(void)
60{ 60{
61#if XCHAL_HAVE_CP 61#if XCHAL_HAVE_CP
62 unsigned long i = 0; 62 unsigned long i = 0;
@@ -64,7 +64,7 @@ extern __inline__ void __clear_cpenable(void)
64#endif 64#endif
65} 65}
66 66
67extern __inline__ void enable_coprocessor(int i) 67static inline void enable_coprocessor(int i)
68{ 68{
69#if XCHAL_HAVE_CP 69#if XCHAL_HAVE_CP
70 int cp; 70 int cp;
@@ -74,7 +74,7 @@ extern __inline__ void enable_coprocessor(int i)
74#endif 74#endif
75} 75}
76 76
77extern __inline__ void disable_coprocessor(int i) 77static inline void disable_coprocessor(int i)
78{ 78{
79#if XCHAL_HAVE_CP 79#if XCHAL_HAVE_CP
80 int cp; 80 int cp;
@@ -123,7 +123,7 @@ do { \
123 * cmpxchg 123 * cmpxchg
124 */ 124 */
125 125
126extern __inline__ unsigned long 126static inline unsigned long
127__cmpxchg_u32(volatile int *p, int old, int new) 127__cmpxchg_u32(volatile int *p, int old, int new)
128{ 128{
129 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t" 129 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
@@ -173,7 +173,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
173 * where no register reference will cause an overflow. 173 * where no register reference will cause an overflow.
174 */ 174 */
175 175
176extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) 176static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
177{ 177{
178 unsigned long tmp; 178 unsigned long tmp;
179 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t" 179 __asm__ __volatile__("rsil a15, "__stringify(LOCKLEVEL)"\n\t"
diff --git a/include/asm-xtensa/tlbflush.h b/include/asm-xtensa/tlbflush.h
index 23bfe9db45f5..43f6ec859af9 100644
--- a/include/asm-xtensa/tlbflush.h
+++ b/include/asm-xtensa/tlbflush.h
@@ -39,7 +39,7 @@ extern void flush_tlb_range(struct vm_area_struct*,unsigned long,unsigned long);
39 * page-table pages. 39 * page-table pages.
40 */ 40 */
41 41
42extern inline void flush_tlb_pgtables(struct mm_struct *mm, 42static inline void flush_tlb_pgtables(struct mm_struct *mm,
43 unsigned long start, unsigned long end) 43 unsigned long start, unsigned long end)
44{ 44{
45} 45}
@@ -51,26 +51,26 @@ extern inline void flush_tlb_pgtables(struct mm_struct *mm,
51#define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2) 51#define ITLB_PROBE_SUCCESS (1 << ITLB_WAYS_LOG2)
52#define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2) 52#define DTLB_PROBE_SUCCESS (1 << DTLB_WAYS_LOG2)
53 53
54extern inline unsigned long itlb_probe(unsigned long addr) 54static inline unsigned long itlb_probe(unsigned long addr)
55{ 55{
56 unsigned long tmp; 56 unsigned long tmp;
57 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr)); 57 __asm__ __volatile__("pitlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
58 return tmp; 58 return tmp;
59} 59}
60 60
61extern inline unsigned long dtlb_probe(unsigned long addr) 61static inline unsigned long dtlb_probe(unsigned long addr)
62{ 62{
63 unsigned long tmp; 63 unsigned long tmp;
64 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr)); 64 __asm__ __volatile__("pdtlb %0, %1\n\t" : "=a" (tmp) : "a" (addr));
65 return tmp; 65 return tmp;
66} 66}
67 67
68extern inline void invalidate_itlb_entry (unsigned long probe) 68static inline void invalidate_itlb_entry (unsigned long probe)
69{ 69{
70 __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe)); 70 __asm__ __volatile__("iitlb %0; isync\n\t" : : "a" (probe));
71} 71}
72 72
73extern inline void invalidate_dtlb_entry (unsigned long probe) 73static inline void invalidate_dtlb_entry (unsigned long probe)
74{ 74{
75 __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe)); 75 __asm__ __volatile__("idtlb %0; dsync\n\t" : : "a" (probe));
76} 76}
@@ -80,68 +80,68 @@ extern inline void invalidate_dtlb_entry (unsigned long probe)
80 * caller must follow up with an 'isync', which can be relatively 80 * caller must follow up with an 'isync', which can be relatively
81 * expensive on some Xtensa implementations. 81 * expensive on some Xtensa implementations.
82 */ 82 */
83extern inline void invalidate_itlb_entry_no_isync (unsigned entry) 83static inline void invalidate_itlb_entry_no_isync (unsigned entry)
84{ 84{
85 /* Caller must follow up with 'isync'. */ 85 /* Caller must follow up with 'isync'. */
86 __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) ); 86 __asm__ __volatile__ ("iitlb %0\n" : : "a" (entry) );
87} 87}
88 88
89extern inline void invalidate_dtlb_entry_no_isync (unsigned entry) 89static inline void invalidate_dtlb_entry_no_isync (unsigned entry)
90{ 90{
91 /* Caller must follow up with 'isync'. */ 91 /* Caller must follow up with 'isync'. */
92 __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) ); 92 __asm__ __volatile__ ("idtlb %0\n" : : "a" (entry) );
93} 93}
94 94
95extern inline void set_itlbcfg_register (unsigned long val) 95static inline void set_itlbcfg_register (unsigned long val)
96{ 96{
97 __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t" 97 __asm__ __volatile__("wsr %0, "__stringify(ITLBCFG)"\n\t" "isync\n\t"
98 : : "a" (val)); 98 : : "a" (val));
99} 99}
100 100
101extern inline void set_dtlbcfg_register (unsigned long val) 101static inline void set_dtlbcfg_register (unsigned long val)
102{ 102{
103 __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t" 103 __asm__ __volatile__("wsr %0, "__stringify(DTLBCFG)"; dsync\n\t"
104 : : "a" (val)); 104 : : "a" (val));
105} 105}
106 106
107extern inline void set_ptevaddr_register (unsigned long val) 107static inline void set_ptevaddr_register (unsigned long val)
108{ 108{
109 __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n" 109 __asm__ __volatile__(" wsr %0, "__stringify(PTEVADDR)"; isync\n"
110 : : "a" (val)); 110 : : "a" (val));
111} 111}
112 112
113extern inline unsigned long read_ptevaddr_register (void) 113static inline unsigned long read_ptevaddr_register (void)
114{ 114{
115 unsigned long tmp; 115 unsigned long tmp;
116 __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp)); 116 __asm__ __volatile__("rsr %0, "__stringify(PTEVADDR)"\n\t" : "=a" (tmp));
117 return tmp; 117 return tmp;
118} 118}
119 119
120extern inline void write_dtlb_entry (pte_t entry, int way) 120static inline void write_dtlb_entry (pte_t entry, int way)
121{ 121{
122 __asm__ __volatile__("wdtlb %1, %0; dsync\n\t" 122 __asm__ __volatile__("wdtlb %1, %0; dsync\n\t"
123 : : "r" (way), "r" (entry) ); 123 : : "r" (way), "r" (entry) );
124} 124}
125 125
126extern inline void write_itlb_entry (pte_t entry, int way) 126static inline void write_itlb_entry (pte_t entry, int way)
127{ 127{
128 __asm__ __volatile__("witlb %1, %0; isync\n\t" 128 __asm__ __volatile__("witlb %1, %0; isync\n\t"
129 : : "r" (way), "r" (entry) ); 129 : : "r" (way), "r" (entry) );
130} 130}
131 131
132extern inline void invalidate_page_directory (void) 132static inline void invalidate_page_directory (void)
133{ 133{
134 invalidate_dtlb_entry (DTLB_WAY_PGTABLE); 134 invalidate_dtlb_entry (DTLB_WAY_PGTABLE);
135} 135}
136 136
137extern inline void invalidate_itlb_mapping (unsigned address) 137static inline void invalidate_itlb_mapping (unsigned address)
138{ 138{
139 unsigned long tlb_entry; 139 unsigned long tlb_entry;
140 while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS) 140 while ((tlb_entry = itlb_probe (address)) & ITLB_PROBE_SUCCESS)
141 invalidate_itlb_entry (tlb_entry); 141 invalidate_itlb_entry (tlb_entry);
142} 142}
143 143
144extern inline void invalidate_dtlb_mapping (unsigned address) 144static inline void invalidate_dtlb_mapping (unsigned address)
145{ 145{
146 unsigned long tlb_entry; 146 unsigned long tlb_entry;
147 while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS) 147 while ((tlb_entry = dtlb_probe (address)) & DTLB_PROBE_SUCCESS)
@@ -165,28 +165,28 @@ extern inline void invalidate_dtlb_mapping (unsigned address)
165 * as[07..00] contain the asid 165 * as[07..00] contain the asid
166 */ 166 */
167 167
168extern inline unsigned long read_dtlb_virtual (int way) 168static inline unsigned long read_dtlb_virtual (int way)
169{ 169{
170 unsigned long tmp; 170 unsigned long tmp;
171 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 171 __asm__ __volatile__("rdtlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
172 return tmp; 172 return tmp;
173} 173}
174 174
175extern inline unsigned long read_dtlb_translation (int way) 175static inline unsigned long read_dtlb_translation (int way)
176{ 176{
177 unsigned long tmp; 177 unsigned long tmp;
178 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 178 __asm__ __volatile__("rdtlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
179 return tmp; 179 return tmp;
180} 180}
181 181
182extern inline unsigned long read_itlb_virtual (int way) 182static inline unsigned long read_itlb_virtual (int way)
183{ 183{
184 unsigned long tmp; 184 unsigned long tmp;
185 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 185 __asm__ __volatile__("ritlb0 %0, %1\n\t" : "=a" (tmp), "+a" (way));
186 return tmp; 186 return tmp;
187} 187}
188 188
189extern inline unsigned long read_itlb_translation (int way) 189static inline unsigned long read_itlb_translation (int way)
190{ 190{
191 unsigned long tmp; 191 unsigned long tmp;
192 __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way)); 192 __asm__ __volatile__("ritlb1 %0, %1\n\t" : "=a" (tmp), "+a" (way));
diff --git a/include/asm-xtensa/types.h b/include/asm-xtensa/types.h
index ebac00469852..9d99a8e9e337 100644
--- a/include/asm-xtensa/types.h
+++ b/include/asm-xtensa/types.h
@@ -58,8 +58,6 @@ typedef unsigned long long u64;
58 58
59typedef u32 dma_addr_t; 59typedef u32 dma_addr_t;
60 60
61typedef unsigned int kmem_bufctl_t;
62
63#endif /* __KERNEL__ */ 61#endif /* __KERNEL__ */
64#endif 62#endif
65 63
diff --git a/include/asm-xtensa/uaccess.h b/include/asm-xtensa/uaccess.h
index 35576b25c7b2..fc268ac923c0 100644
--- a/include/asm-xtensa/uaccess.h
+++ b/include/asm-xtensa/uaccess.h
@@ -211,7 +211,7 @@
211#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size))) 211#define __access_ok(addr,size) (__kernel_ok || __user_ok((addr),(size)))
212#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size)) 212#define access_ok(type,addr,size) __access_ok((unsigned long)(addr),(size))
213 213
214extern inline int verify_area(int type, const void * addr, unsigned long size) 214static inline int verify_area(int type, const void * addr, unsigned long size)
215{ 215{
216 return access_ok(type,addr,size) ? 0 : -EFAULT; 216 return access_ok(type,addr,size) ? 0 : -EFAULT;
217} 217}
@@ -464,7 +464,7 @@ __generic_copy_from_user(void *to, const void *from, unsigned long n)
464 * success. 464 * success.
465 */ 465 */
466 466
467extern inline unsigned long 467static inline unsigned long
468__xtensa_clear_user(void *addr, unsigned long size) 468__xtensa_clear_user(void *addr, unsigned long size)
469{ 469{
470 if ( ! memset(addr, 0, size) ) 470 if ( ! memset(addr, 0, size) )
@@ -472,7 +472,7 @@ __xtensa_clear_user(void *addr, unsigned long size)
472 return 0; 472 return 0;
473} 473}
474 474
475extern inline unsigned long 475static inline unsigned long
476clear_user(void *addr, unsigned long size) 476clear_user(void *addr, unsigned long size)
477{ 477{
478 if (access_ok(VERIFY_WRITE, addr, size)) 478 if (access_ok(VERIFY_WRITE, addr, size))
@@ -486,7 +486,7 @@ clear_user(void *addr, unsigned long size)
486extern long __strncpy_user(char *, const char *, long); 486extern long __strncpy_user(char *, const char *, long);
487#define __strncpy_from_user __strncpy_user 487#define __strncpy_from_user __strncpy_user
488 488
489extern inline long 489static inline long
490strncpy_from_user(char *dst, const char *src, long count) 490strncpy_from_user(char *dst, const char *src, long count)
491{ 491{
492 if (access_ok(VERIFY_READ, src, 1)) 492 if (access_ok(VERIFY_READ, src, 1))
@@ -502,7 +502,7 @@ strncpy_from_user(char *dst, const char *src, long count)
502 */ 502 */
503extern long __strnlen_user(const char *, long); 503extern long __strnlen_user(const char *, long);
504 504
505extern inline long strnlen_user(const char *str, long len) 505static inline long strnlen_user(const char *str, long len)
506{ 506{
507 unsigned long top = __kernel_ok ? ~0UL : TASK_SIZE - 1; 507 unsigned long top = __kernel_ok ? ~0UL : TASK_SIZE - 1;
508 508