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authorChris Zankel <chris@zankel.net>2007-08-07 02:12:24 -0400
committerChris Zankel <chris@zankel.net>2007-08-27 16:53:56 -0400
commit26465f2f4f5a253f22596fc9245a6bb5c0856ee1 (patch)
tree1b8de24e62516d66cbbe9ccabe663457dbd50348 /include/asm-xtensa
parent5c1c8085b5dc30ae4ff0ee54039e387ed59262bf (diff)
[XTENSA] Use the generic version of get_order
Use the generic version of get_order for processor configurations that don't have the 'nsa/nsau' instructions. Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to 'include/asm-xtensa')
-rw-r--r--include/asm-xtensa/page.h50
1 files changed, 22 insertions, 28 deletions
diff --git a/include/asm-xtensa/page.h b/include/asm-xtensa/page.h
index 1213cde75438..2d6ac21136cf 100644
--- a/include/asm-xtensa/page.h
+++ b/include/asm-xtensa/page.h
@@ -1,11 +1,11 @@
1/* 1/*
2 * linux/include/asm-xtensa/page.h 2 * include/asm-xtensa/page.h
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify 4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version2 as 5 * it under the terms of the GNU General Public License version2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 * 7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc. 8 * Copyright (C) 2001 - 2007 Tensilica Inc.
9 */ 9 */
10 10
11#ifndef _XTENSA_PAGE_H 11#ifndef _XTENSA_PAGE_H
@@ -14,6 +14,11 @@
14#ifdef __KERNEL__ 14#ifdef __KERNEL__
15 15
16#include <asm/processor.h> 16#include <asm/processor.h>
17#include <asm/types.h>
18
19/*
20 * Fixed TLB translations in the processor.
21 */
17 22
18#define XCHAL_KSEG_CACHED_VADDR 0xd0000000 23#define XCHAL_KSEG_CACHED_VADDR 0xd0000000
19#define XCHAL_KSEG_BYPASS_VADDR 0xd8000000 24#define XCHAL_KSEG_BYPASS_VADDR 0xd8000000
@@ -26,13 +31,13 @@
26 */ 31 */
27 32
28#define PAGE_SHIFT 12 33#define PAGE_SHIFT 12
29#define PAGE_SIZE (1 << PAGE_SHIFT) 34#define PAGE_SIZE (__XTENSA_UL_CONST(1) << PAGE_SHIFT)
30#define PAGE_MASK (~(PAGE_SIZE-1)) 35#define PAGE_MASK (~(PAGE_SIZE-1))
31#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE - 1) & PAGE_MASK) 36#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE - 1) & PAGE_MASK)
32 37
33#define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR 38#define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR
34#define MAX_MEM_PFN XCHAL_KSEG_SIZE 39#define MAX_MEM_PFN XCHAL_KSEG_SIZE
35#define PGTABLE_START 0x80000000 40#define PGTABLE_START 0x80000000
36 41
37#ifdef __ASSEMBLY__ 42#ifdef __ASSEMBLY__
38 43
@@ -58,34 +63,23 @@ typedef struct { unsigned long pgprot; } pgprot_t;
58 63
59/* 64/*
60 * Pure 2^n version of get_order 65 * Pure 2^n version of get_order
66 * Use 'nsau' instructions if supported by the processor or the generic version.
61 */ 67 */
62 68
63static inline int get_order(unsigned long size) 69#if XCHAL_HAVE_NSA
70
71static inline __attribute_const__ int get_order(unsigned long size)
64{ 72{
65 int order; 73 int lz;
66#ifndef XCHAL_HAVE_NSU 74 asm ("nsau %0, %1" : "=r" (lz) : "r" ((size - 1) >> PAGE_SHIFT));
67 unsigned long x1, x2, x4, x8, x16; 75 return 32 - lz;
68
69 size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
70 x1 = size & 0xAAAAAAAA;
71 x2 = size & 0xCCCCCCCC;
72 x4 = size & 0xF0F0F0F0;
73 x8 = size & 0xFF00FF00;
74 x16 = size & 0xFFFF0000;
75 order = x2 ? 2 : 0;
76 order += (x16 != 0) * 16;
77 order += (x8 != 0) * 8;
78 order += (x4 != 0) * 4;
79 order += (x1 != 0);
80
81 return order;
82#else
83 size = (size - 1) >> PAGE_SHIFT;
84 asm ("nsau %0, %1" : "=r" (order) : "r" (size));
85 return 32 - order;
86#endif
87} 76}
88 77
78#else
79
80# include <asm-generic/page.h>
81
82#endif
89 83
90struct page; 84struct page;
91extern void clear_page(void *page); 85extern void clear_page(void *page);