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authorChris Zankel <czankel@tensilica.com>2005-06-24 01:01:26 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-24 03:05:22 -0400
commit9a8fd5589902153a134111ed7a40f9cca1f83254 (patch)
tree6f7a06de25bdf0b2d94623794c2cbbc66b5a77f6 /include/asm-xtensa/timex.h
parent3f65ce4d141e435e54c20ed2379d983d362a2cb5 (diff)
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6
The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-xtensa/timex.h')
-rw-r--r--include/asm-xtensa/timex.h94
1 files changed, 94 insertions, 0 deletions
diff --git a/include/asm-xtensa/timex.h b/include/asm-xtensa/timex.h
new file mode 100644
index 000000000000..d14a3755a12b
--- /dev/null
+++ b/include/asm-xtensa/timex.h
@@ -0,0 +1,94 @@
1/*
2 * include/asm-xtensa/timex.h
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2001 - 2005 Tensilica Inc.
9 */
10
11#ifndef _XTENSA_TIMEX_H
12#define _XTENSA_TIMEX_H
13
14#ifdef __KERNEL__
15
16#include <asm/processor.h>
17#include <linux/stringify.h>
18
19#if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) == 1
20# define LINUX_TIMER 0
21#elif XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) == 1
22# define LINUX_TIMER 1
23#elif XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) == 1
24# define LINUX_TIMER 2
25#else
26# error "Bad timer number for Linux configurations!"
27#endif
28
29#define LINUX_TIMER_INT XCHAL_TIMER_INTERRUPT(LINUX_TIMER)
30#define LINUX_TIMER_MASK (1L << LINUX_TIMER_INT)
31
32#define CLOCK_TICK_RATE 1193180 /* (everyone is using this value) */
33#define CLOCK_TICK_FACTOR 20 /* Factor of both 10^6 and CLOCK_TICK_RATE */
34#define FINETUNE ((((((long)LATCH * HZ - CLOCK_TICK_RATE) << SHIFT_HZ) * \
35 (1000000/CLOCK_TICK_FACTOR) / (CLOCK_TICK_RATE/CLOCK_TICK_FACTOR)) \
36 << (SHIFT_SCALE-SHIFT_HZ)) / HZ)
37
38#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
39extern unsigned long ccount_per_jiffy;
40extern unsigned long ccount_nsec;
41#define CCOUNT_PER_JIFFY ccount_per_jiffy
42#define CCOUNT_NSEC ccount_nsec
43#else
44#define CCOUNT_PER_JIFFY (CONFIG_XTENSA_CPU_CLOCK*(1000000UL/HZ))
45#define CCOUNT_NSEC (1000000000UL / CONFIG_XTENSA_CPU_CLOCK)
46#endif
47
48
49typedef unsigned long long cycles_t;
50
51/*
52 * Only used for SMP.
53 */
54
55extern cycles_t cacheflush_time;
56
57#define get_cycles() (0)
58
59
60/*
61 * Register access.
62 */
63
64#define WSR_CCOUNT(r) __asm__("wsr %0,"__stringify(CCOUNT) :: "a" (r))
65#define RSR_CCOUNT(r) __asm__("rsr %0,"__stringify(CCOUNT) : "=a" (r))
66#define WSR_CCOMPARE(x,r) __asm__("wsr %0,"__stringify(CCOMPARE_0)"+"__stringify(x) :: "a"(r))
67#define RSR_CCOMPARE(x,r) __asm__("rsr %0,"__stringify(CCOMPARE_0)"+"__stringify(x) : "=a"(r))
68
69static inline unsigned long get_ccount (void)
70{
71 unsigned long ccount;
72 RSR_CCOUNT(ccount);
73 return ccount;
74}
75
76static inline void set_ccount (unsigned long ccount)
77{
78 WSR_CCOUNT(ccount);
79}
80
81static inline unsigned long get_linux_timer (void)
82{
83 unsigned ccompare;
84 RSR_CCOMPARE(LINUX_TIMER, ccompare);
85 return ccompare;
86}
87
88static inline void set_linux_timer (unsigned long ccompare)
89{
90 WSR_CCOMPARE(LINUX_TIMER, ccompare);
91}
92
93#endif /* __KERNEL__ */
94#endif /* _XTENSA_TIMEX_H */